QPHY-DDR3

Teledyne LeCroy QPHY-DDR3 automated compliance software enables engineers to consistently run test on DDR3/3L and LPDDR3 memory standards set by the JEDEC Specification. This includes pass/fail reporting for Electrical and Timing test requirements for Clock (CK), Strobe (DQS), Data (DQ) and the command address bus signals. Paired with the DDR Debug Toolkit provides the tools to confidently test all stages of memory design, from initial turn-on through final compliance test.

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Key Features

DDR3 test coverage as described by JESD79-3F
DDR3L test coverage as described by JESD79-3-1A
LPDDR3 test coverage as described by JESD209-3B
Test speeds up to 2133 MT/s
Perform automated compliance of JEDEC electrical requirements
Measurement repeatability, consistency and accuracy
Save Pass/Fail reports with annotated screenshots
Analyze compliance failures in a dedicated Debug Toolkit
Included in DDR5 Software Bundle

DDR5 Software Bundle

The best tools cover all stages of design, from early turn-on through compliance. This means planning for the future, it might be testing DDR3 to DDR4 or upgrading to DDR5 designs. The DDR5 Bundle includes all the best tools (DDR Debug Toolkit + QualiPHY) across all generations, in a single purchasable software bundle.

QualiPHY

QualiPHY is designed to reduce the time, effort, and specialized knowledge needed to perform compliance testing on high-speed serial buses.