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販売終了しました。 
モジュール型・オシロスコープ・システム
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| マスター・モジュール | コントロール・モジュール | |
| フロントパネル・コントロール Controls | ○ | ○ |
| 内蔵ディスプレイ | ○ | ○ |
| ChannelSyncアーキテクチャー | ○ | ○ |
| 内蔵捕捉モジュール | 13〜20GHzモデル： ○(4ch） |
× |
| 30GHzモデル： ○(2ch@30GHz, 4ch@20 GHz) |
× | |
| スレーブ･モジュール | 13〜20GHzモデル： ４モジュールまで追加可能 (最大20ch） |
13〜20GHzモデル： ５モジュールまで追加可能 (最大20ch) |
| 30GHzモデル： ４モジュールまで追加可能 （最大10ch@30GHz、最大20ch@20GHz) |
30GHzモデル： ５モジュールまで追加可能 （最大10ch@30GHz、 最大20ch@20GHz) |
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| CPU | 外部モジュール（標準装備） | 内蔵（標準装備） |
基本仕様
| マスター・モジュール* | ||||
|---|---|---|---|---|
| モデル名 | ch数 | 帯域 | サンプリング速度 | 標準メモリ |
| LabMaster 913MZi-A | 4ch | 13GHz | 40-80 GS/s** | 20Mポイント** |
| LabMaster 916MZi-A | 4ch | 16GHz | 40-80 GS/s** | 20Mポイント** |
| LabMaster 920MZi-A | 4ch | 20GHz | 40-80 GS/s** | 20Mポイント** |
| LabMaster 930MZi-A | 4ch | 30GHz | 40-80 GS/s | 40Mポイント |
| LABMASTER MCM-ZI | LabMasterコントロールモジュール | |||
| SDA MCM-ZI | SDAコントロールモジュール | |||
| DDA MCM-ZI | DDAコントロールモジュール | |||
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*マスター・モジュール全機種に標準装備： |
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スレーブ・モジュール |
||||
|---|---|---|---|---|
| 型番 | ch数 | 帯域 | サンプリング速度 | 標準メモリ |
| LabMaster 913SZi-A | 4ch | 13GHz | 40-80 GS/s** | 20Mポイント** |
| LabMaster 916SZi-A | 4ch | 16GHz | 40-80 GS/s** | 20Mポイント** |
| LabMaster 920SZi-A | 4ch | 20GHz | 40-80 GS/s** | 20Mポイント** |
| LabMaster 930SZi-A | 4ch | 30GHz | 40-80 GS/s | 40Mポイント |
|
** 帯域4〜20GHzモデルではインターリーオプションWM8Zi-2X80GSが必要 |
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モデルごとスペック詳細（モデル名をクリックで詳細表示されます）
LabMaster 9Zi-A 13 GHz Systems
スペック
Vertical System |
|
| Analog (ProLink Input) Bandwidth @ 50 Ω (-3 dB) | 13 GHz (≥10 mV/div) |
| Analog (ProBus Input) Bandwidth @ 50 Ω (-3 dB) | For 9xxMZi-A "Master" Acquisition
Module: 3.5 GHz (≥10 mV/div) For 9CZi-A Master Control Module: Not Applicable |
| Analog (ProBus Input) Bandwidth @ 1 MΩ (-3 dB) | For 9xxMZi-A "Master" Acquisition
Module: 500 MHz (typical, ≥2 mV/div) For 9CZi-A Master Control Module: Not Applicable |
| Analog Bandwidth @ 50 Ω (-3 dB) (2.4/2.92 Inputs) | Not Applicable |
| Rise Time (typical, 10-90%, 50 Ω) | 32.5 ps (test limit, flatness mode) |
| Rise Time (typical, 20-80%, 50 Ω) | 24.5 ps (flatness mode) |
| Input Channels | Up to 20, depending on configuration
selected. (Any combination of up to 20 ProLink input channels, or 4 ProBus input channels) |
| Bandwidth Limiters | 20 MHz, 200 MHz, 1 GHz, 4 GHz, 6 GHz, 8 GHz |
| Input Impedance | ProLink Inputs: 50 Ω+/-2% for ≤100
mV/div, 50 Ω+/-3% for >100 mV/div ProBus Inputs: 50 Ω+/-2% or 1 MΩ||16pF, 10 MΩ || 11 pF with supplied Probe |
| Input Coupling | ProLink Inputs - 50 Ω: DC, GND ProBus Inputs - 1 MΩ: AC, DC, GND; 50 Ω: DC, GND |
| Maximum Input Voltage | 50 Ω (ProLink): ±2 Vmax@≤100mV/div,
5.5Vrms@>100mV/div 50 Ω (ProBus): ±5 Vmax, 3.5 Vrms 1 MΩ (ProBus): 250 V max. (peak AC: < 10 kHz + DC) |
| Channel-Channel Isolation | DC to 10 GHz: 50 dB (>315:1) 10 to 15 GHz: 46 dB (>200:1) 15 to 20 GHz: 40 dB (>100:1) (For any two ProLink input channels, same or different v/div settings, typical) |
| Vertical Resolution | 8 bits; up to 11 bits with enhanced resolution (ERES) |
| Sensitivity | 50 Ω (ProLink): 2 mV-1 V/div, fully
variable (2-9.9 mV/div via zoom) 50 Ω (ProBus): 2 mV-1 V/div, fully variable; 1 MΩ (ProBus): 2 mV-10 V/div, fully variable |
| DC Vertical Gain Accuracy (Gain Component of DC Accuracy) | ±1% F.S. (typical), offset at 0V; ±1.5% F.S. (test limit), offset at 0V |
| Offset Range | 50 Ω (ProLink): ±500 mV @ 2-100 mV/div ±4 V @ >100 mV/div -1 V/div 50 Ω (ProBus): ±750 mV @ 2-100 mV/div ±4 V @ >100 mV/div -1 V/div 1 MΩ: ±1V @ 2-140 mV/div ±10V @ 142mV-1.40V/div ±100V @ 1.42V-10V/div |
| DC Vertical Offset Accuracy | ±(1.5% of offset setting + 1 mV) (test limit) |
Horizontal System |
|
| Timebases | Internal timebase with 10 GHz clock frequency common to all input channels. Single, distributed 10 GHz clock for all channels ensures precise synchronization with timing accuracy between all channels identical to that provided within a single, conventional oscilloscope package. |
| Time/Division Range | 20 ps/div-64 s/div (Real-Time Mode: 20 ps/div - 64 s/div; RIS mode: 20 ps/div - 10 ns/div, user selectable at ≤10ns/div; Roll mode: Not available |
| Clock Accuracy | < 1 ppm + (aging of 0.5ppm/yr from last calibration) |
| Time Interval Accuracy | < 0.06 / SR + (clock accuracy* Reading) (rms) |
| Jitter Noise Floor | For Acq. Length ≤10μs: 250 fsrms (TIE,
typical) For Acq. Length >10μs: 300 fsrms (TIE, typical) |
| Trigger and Interpolator Jitter | <0.1 psrms (typical, software assisted), 2 psrms (typical, hardware), |
| Channel-Channel Deskew Range | ±9 x time/div. setting or 25 ns max. (whichever is larger), each channel |
| External Timebase Reference (Input) | 10 MHz; 50 Ω impedance, applied at the rear input |
| External Timebase Reference (Output) | 10 MHz; 50 Ω impedance, output at the rear |
| External Clock | Not Available |
Acquisition System |
|
| Single-Shot Sample Rate/Ch | 40 GS/s on each channel. (80 GS/s when combining channels using the optional WM8Zi-2X80GS External Interleaving Device) |
| Random Interleaved Sampling (RIS) | 200 GS/s for repetitive signals (20 ps/div to 10 ns/div) |
| Maximum Trigger Rate | 1,000,000 waveforms/second (in Sequence Mode, up to 4 channels) |
| Intersegment Time | 1 μs |
| Memory Options (4 Ch / 2 Ch / 1Ch) | S-32 Option: 32M / 32M / 32M (7,500) M-64 Option: 64M / 64M / 64M (15,000) L-128 Option: 128M / 128M / 128M (15,000) VL-256 Option: 256M / 256M / 256M (15,000) Note: On all memory options, memory and sample Rate can be doubled in half channel mode with use of WM8Zi-2X80GS External Interleaving Device. |
| Standard Memory (4 Ch / 2 Ch / 1Ch) (Number of Segments) | 20 M / 20 M / 20M Memory and Sample Rate can be doubled in half channel mode with use of WM8Zi-2X80GS External Interleaving Device. (2000) |
Acquisition Processing |
|
| Averaging | Summed averaging to 1 million sweeps; continuous averaging to 1 million sweeps |
| Enhanced Resolution (ERES) | From 8.5 to 11 bits vertical resolution |
| Envelope (Extrema) | Envelope, floor, or roof for up to 1 million sweeps |
| Interpolation | Linear or Sin x/x |
Triggering System |
|
| Modes | Normal, Auto, Single, and Stop |
| Sources | Using 9xxMZi-A Master Acquisition
Module: any input channel, Aux, Aux/10, Line, or Fast Edge on
9xxMZi-A, or any input channel (Edge trigger only) on 9xxSZi-A Slave
Acquisition Modules. Using 9CZi-A Master Control Module: Any Ch 1-4 or Fast Edge of the first 9xxSZi-A "Slave" Acquisition Module input, or any input channel (Edge trigger only) on additional 9xxSZi-A Slave Acquisition Modules. Slope and level unique to each source except line trigger. |
| Coupling Mode | DC, AC, HFRej, LFRej |
| Pre-trigger Delay | 0-100% of memory size (adjustable in 1% increments of 100 ns) |
| Post-trigger Delay | 0-10,000 divisions in real time mode, limited at slower time/div settings or in roll mode |
| Hold-off by Time | From 2 ns up to 20 s or from 1 to 99,999,999 events |
| Internal Trigger Range | ±4.1 div from center |
| Trigger Sensitivity with Edge Trigger (Ch 1-4) 2.4/2.92mm Inputs | Not Applicable |
| Trigger Sensitivity with Edge Trigger (Ch 1–4) ProBus Inputs | 2 div @ < 3.5 GHz, 1.5 div @ < 1.75 GHz, 1.0 div @ < 200 MHz, (for DC coupling, ≥ 10 mV/div, 50 Ω ) |
| Trigger Sensitivity with Edge Trigger (Ch 1–4) ProLink Inputs | For 9xxMZi-A "Master" Acquisition
Module or Ch 1-4 of a 9xxSZi-A "Slave" Acquisition Module when used
with a 9CZi-A Master Control Module: 3 div @ < 13 GHz, 1.5 div @ < 3 GHz, 1.0 div @ < 200 MHz, (for DC, AC, LFRej coupling, ≥ 10 mV/div, 50 Ω ) |
| External Trigger Sensitivity, (Edge Trigger) | For 9xxMZi-A "Master" Acquisition
Module or Slave Acquisition Module used with 9CZi-A Master Control
Module: 2 div @ < 1 GHz, 1.5 div @ < 500 MHz, 1.0 div @ < 200 MHz, (for DC coupling) |
| External Trigger Input Range | For 9xxMZi-A "Master" Acquisition Module or Ch 1-4 of a 9xxSZi-A "Slave" Acquisition Module when used with a 9CZi-A Master Control Module: Aux (±0.4 V); Aux/10 (±4 V) |
| Max. Trigger Frequency, SMART Trigger | For 9xxMZi-A "Master" Acquisition
Module or Ch 1-4 of a 9xxSZi-A "Slave" Acquisition Module when used
with a 9CZi-A Master Control Module: 2.0 GHz @ ≥ 10 mV/div (minimum triggerable width 200 ps) |
Basic Triggers |
|
| Edge | Triggers when signal meets slope (positive, negative, or either) and level condition. |
| Window | Triggers when signal exits a window defined by adjustable thresholds |
| TV-Composite Video | Triggers NTSC or PAL with selectable line and field; HDTV (720p, 1080i, 1080p) with selectable frame rate (50 or 60 Hz) and Line; or CUSTOM with selectable Fields (1-8), Lines (up to 2000), Frame Rates (25, 30, 50, or 60 Hz), Interlacing (1:1, 2:1, 4:1, 8:1), or Synch Pulse Slope (Positive or Negative). |
SMART Triggers |
|
| State or Edge Qualified | Triggers on any input source only if a defined state or edge occurred on another input source. Holdoff between sources is selectable by time or events. |
| Qualified First | In Sequence acquisition mode, triggers repeatably on event B only if a defined pattern, state, or edge (event A) is satisfied in the first segment of the acquisition. Holdoff between sources is selectable by time or events. |
| Dropout | Triggers if signal drops out for longer than selected time between 1 ns and 20 s. |
| Pattern | Logic combination (AND, NAND, OR, NOR) of 5 inputs (4 channels and external trigger input). Each source can be high, low, or don't care. The High and Low level can be selected independently. Triggers at start or end of the pattern. |
SMART Triggers with Exclusion Technology |
|
| Glitch | Triggers on positive or negative glitches with widths selectable as low as 200ps to 20 s, or on intermittent faults. |
| Width (Signal or Pattern) | Triggers on positive, negative, or both widths with widths selectable as low as 200ps to 20 s, or on intermittent faults. |
| Interval (Signal or Pattern) | Triggers on intervals selectable between 1 ns and 20 s. |
| Timeout (State/Edge Qualified) | Triggers on any source if a given state
(or transition edge) has occurred on another source. Delay between sources is 1 ns to 20 s, or 1 to 99,999,999 events. |
| Runt | Trigger on positive or negative runts defined by two voltage limits and two time limits. Select between 1 ns and 20 ns. |
| Slew Rate | Trigger on edge rates. Select limits for dV, dt, and slope. Select edge limits between 1 ns and 20 ns. |
| Exclusion Triggering | Trigger on intermittent faults by specifying the expected behavior and triggering when that condition is not met |
Cascade (Sequence) Triggering |
|
| Capability | Arm on "A" event, then Trigger on "B" event. Or Arm on "A" event, then Qualify on "B" event, and Trigger on "C" event. Or Arm on "A" event, then Qualify on "B" then "C" event, and Trigger on "D" event |
| Types | A, B, C, or D event: Edge, Glitch, Width, Window, Dropout, Interval, Runt, Slew Rate, or Pattern (analog) |
| Holdoff | Holdoff between A and B, B and C, C or D, or any is selectable by time or number of events |
| Reset | Reset between A and B, B and C, C and D, or any combination is selectable in time or number of events |
High Speed Serial Protocol Triggering |
|
| Data Rates | (Option LM9Zi-HSPT, for signals connected to 9xxMZi-A "Master" Acquisition Module Channel 4 input) 100 Mb/s - 2.7 Gb/s, 3.0, 3.125 Gb/s |
| Pattern Length | 80 bits, NRZ or 8b10b |
| Clock and Data Outputs | 400mVp-p (typical) AC coupled |
| Clock Recovery Jitter | 2 psrms + 0.3% Unit Interval rms for PRBS data patterns with 50% transition density (typical) |
| Hardware Clock Recovery Loop BW | PLL Loop BW = Fbaud/5500, 100 Mb/s to 2.488 Gb/s (typical) |
Low Speed Serial Protocol Triggering (Optional) |
|
| Optionally available | I2C, SPI (SPI, SSPI, SIOP), UART-RS232, CAN, LIN, FlexRay, I2S (Audio), MIL-1553 |
Color Waveform Display |
|
| Type | On 9xxMZi-A "Master" Acquisition Module or 9CZi-A Master Control Module: Color 15.3" flat panel TFT-Active Matrix LCD with high resolution touch screen |
| Resolution | WXGA; 1280 x 768 pixels. |
| Number of traces | Display a maximum of 40 traces. Simultaneously display channel, zoom, memory and math traces. |
| Grid Styles | Auto, Single, Dual, Quad, Octal, X-Y, Single+X-Y, Dual+X-Y, Twelve, Sixteen, Twenty |
| Waveform Representation | Sample dots joined, or sample dots only |
Internal Waveform Memory |
|
| Internal Waveform Memory | 4 active waveform memory traces (M1-M4) store 16 bit/point full length waveforms. Waveforms can be stored to any number of files limited only by the data storage media capacity. |
LeCroy WaveStream™ Fast Viewing Mode |
|
| Intensity | 256 Intensity Levels, 1-100% adjustable via front panel control |
| Types | Select analog or color-graded |
| Number of Channels | up to 20 simultaneously |
| Max Sampling Rate | 40 GS/s (80 GS/s with optional WM8Zi-2X80GS external interleaving device) |
| Persistence Aging | Select from 500 ms to Infinity |
| Waveforms/second (continuous) | up to 2500 Waveforms/second |
| Operation | Front panel toggle between WaveStream ON (Analog), ON (Color) and OFF |
Automatic Setup |
|
| Auto Setup | Automatically sets timebase, trigger, and sensitivity to display a wide range of repetitive signals |
| Find Vertical Scale | Automatically sets the vertical sensitivity and offset for the selected channel to display a waveform with the maximum dynamic range |
Probes |
|
| Probes | 9xxMZi-A Models: Acquisition Module:
Qty. (4) ÷10 Passive Probes 9xxSZi-A and 9CZi-A Models: No passive probes supplied |
| Probing System | 9xxMZi-A "Master" Acquisition Module:
Probus and ProLink. 9xxSZi-A "Slave" Acquisition Module: ProLink. Automatically detects and supports a variety of compatible probes. |
| Scale Factors | Automatically or manually selected depending on probe used |
| Calibration Output | 9xxMZi-A "Master" Acquisition Module: 1kHz square wave, 1Vp-p (typical), output to probe hook |
Integrated Second Display |
|
| Type | Color 15.3" flat panel TFT-Active
Matrix LCD with high resolution touch screen. Requires ordering of option LM9Zi-VIDEOCARD-Zi-EXTDISP-15 to replace the standard video card in the LabMaster CPU or LabMaster 9CZi-A Master Control Module, so performance described in "External Monitor Port" is no longer provided. DVI and power connector provided to support LeCroy Zi-EXTDISP-15 additional touch screen display accessory. Includes support for extended desktop operation. |
| Resolution | WXGA; 1280 x 768 pixels |
Analog Persistence Display |
|
| Analog and Color-Graded Persistence | Variable saturation levels; stores each trace's persistence data in memory |
| Trace Selection | Activate persistence on all or any combination of traces |
| Sweep Display Modes | All accumulated, or all accumulated with last trace highlighted |
| Persistence Types | Select analog, color, or three-dimensional |
| Persistence Aging | Select from 500 ms to infinity |
High Speed Digitizer Output (Option) |
|
| Type | Option LSIB-1. Installs in LabMaster 9xxMZi-A CPU or LabMaster 9CZi-A Master Control Module and uses one available PCIe slot normally used by a 9xxSZi-A module. |
| Transfer Rate | up to 325 MB/s (typical) |
| Output Protocol | PCI Express, Gen 1 (4 lanes utilized for data transfer) |
| Control Protocol | TCP/IP |
| Command Set | Via Windows Automation, or via LeCroy Remote Command Set |
Processor/CPU |
|
| Type | In 9xxMZi-A CPU or 9CZi-A Master Control Module: Intel® XeonTM X5660 2.8 GHz (or better). There are two processors in each CPU, and each processor has 6 cores for a total of 12 cores and an effective processor speed of 33.6 GHz. |
| Processor Memory | 24 GB standard. Up to 192 GB optionally available. |
| Operating System | Microsoft Windows® 7 Professional Edition (64-bit) |
| Real Time Clock | Date and time displayed with waveform in hardcopy files. SNTP support to synchronize to precision internal clocks. |
Zoom Expansion Traces |
|
| Zoom Expansion Traces | Display up to 20 channels and up to 4 Memory, 8 Math, and 4 Zoom traces |
Setup Storage |
|
| Front Panel and Instrument Status | Store to the internal hard drive, over a network, or to a USB-connected peripheral device. |
Interface |
|
| Remote Control | Via Windows Automation, or via LeCroy Remote Command Set |
| Network Communication Standard | VXI-11 or VICP, LXI Class C (v1.2) Compliant |
| GPIB Port (optional) | Supports IEEE - 488.2. Installs in LabMaster 9xxMZi-A CPU or 9CZi-A Master Control Module and uses one available PCIe slot normally used by a 9xxSZi-A module. |
| LSIB Port (optional) | Supports PCIe Gen1 x4 protocol with LeCroy supplied API. Installs in LabMaster 9xxMZi-A CPU or 9CZi-A Master Control Module and uses one available PCIe slot normally used by a 9xxSZi-A module. |
| Ethernet Port | Supports 10/100/1000BaseT Ethernet interface (RJ45 port) |
| USB Ports | 9xxMZi-A CPU or 9CZi-A Master Control
Module: minimum 2 total USB 2.0 ports on reare of unit to support
Windows compatible devices 9xxMZi "Master" Acquisition Module or 9CZi-A Master Control Module: minimum 3 total USB 2.0 ports on front of unit to support Windows compatible devices. |
| External Monitor Port | In 9xxMZi-A CPU or 9CZi-A Master
Control Module: Dual Link DVI compatible to support internal display or internal display on 9xxMZi-A "Master" Acquisition Module (1280 x 768 pixel resolution) or customer-supplied monitor with up to WQXGA (2560 x 1600 pixel) resolution. 15 pin D-Type WXGA compatible to support customer-supplied external monitor. Only one monitor can operate at a time. |
| Serial Port | Not Available |
| Peripheral Bus | Not Available |
Auxiliary Input |
|
| Signal Types | For External Trigger Input. Located in 9xxMZi-A "Master" Acquisition Module or Slave Acquisition Module #1 (rear-mounted BNC, 50 Ω) used with 9CZi-A Master Control Module. |
| Coupling | 9xxMZi-A "Master" Acquisition Module:
50 Ω: DC; 1 MΩ: AC, DC, GND 9CZi-A Master Control Module: 50 Ω only |
| Max. Input Voltage | 5 Vrms (50 Ω); 250 V (Peak AC < 10 kHz + DC) (1 MΩ) |
Auxiliary Output |
|
| Connector Type | BNC, located on front of 9xxMZi-A "Master" Acquisition Module |
| Signal Types | 9xxMZi-A "Master" Acquisition Module:
Select from calibrator, control signals or Off (Not available with 9CZi-A Master Control Module) |
| Output Signal | 500 Hz-5 MHz square wave or DC level; 0.0 to 500 mV into 50 Ω (0-1 V into 1 MΩ) |
| Control Signals | Trigger enabled, trigger out, pass/fail status, off |
General |
|
| Auto Calibration | Ensures specified DC and timing accuracy is maintained for 1 year minimum. |
Power Requirements |
|
| Voltage | LabMaster 9xxMZi-A "Master" Acquisition
Module and 9xxSZi-A: 100-240 VAC ±10% at 45-66 Hz; 100-120 VAC ±10%
at 380-420 Hz; Automatic AC Voltage Selection, Installation Category
II LabMaster 9xxMZi-A CPU: 100-240 VAC ±10% at 45-66 Hz; Automatic AC Voltage Selection, Installation Category II LabMaster 9CZi-A Master Control Module: 100–240 VAC ±10% at 45-66 Hz; Automatic AC Voltage Selection, Installation Category II |
| Max. Power Consumption | 9xxMZi-A "Master" Acquisition Module -
850 W / 850 VA. 9xxMZi-A CPU - 400 W / 400 VA. 9xxSZi-A "Slave" Acquisition Module - 700 W / 700 VA. 9CZi-A Master Control Module - 450 W / 450 VA. Each Module has a separate power cord. |
Environmental and Safety |
|
| Temperature (Operating) | +5 °C to +40 °C |
| Temperature (Non-Operating) | -20 °C to +60 °C |
| Humidity (Operating) | 5% to 80% relative humidity
(non-condensing) up to +31 °C. Upper limit derates to 50% relative humidity (non-condensing) at +40 °C. |
| Humidity (Non-Operating) | 5% to 95% relative humidity (non-condensing) as tested per MIL-PRF-28800F |
| Altitude (Operating) | Up to 10,000 ft. (3048 m) at or below +25 °C |
| Altitude (Non-Operating) | Up to 40,000 ft. (12,192 m) |
| Random Vibration (Operating) | 0.5 grms 5 Hz to 500 Hz, 15 minutes in each of three orthogonal axes |
| Random Vibration (Non-Operating) | 2.4 grms 5 Hz to 500 Hz, 15 minutes in each of three orthogonal axes |
| Functional Shock | 20 g peak, half sine, 11 ms pulse, 3 shocks (positive and negative) in each of three orthogonal axes, 18 shocks total |
Physical Dimensions |
|
| Dimensions (HWD) | 9xxMZi-A "Master" Acquisition Module
and 9CZi-A Master Control Module - 14"H x 18.4"W x 16"D (355 x 467 x
406 mm). 9xxMZi-A CPU - 5.7"H x 18.2"W x 20.8"D (145mm x 462mm x 527mm). 9xxSZi-A "Slave" Acquisition Module - 7"H x 18.2"W x 20.8"D (177mm x 462mm x 527mm). |
| Weight | 9xxMZi-A "Master" Acquisition Module -
48 lbs. (22 kg) 9xxMZi-A CPU - 29 lbs. (13 kg) 9xxSZi-A "Slave" Acquisition Module - 37 lbs. (17 kg) 9CZi-A Master Control Module - 41 lbs. (19 kg) |
| Shipping Weight | 9xxMZi-A "Master" Acquisition Module -
70 lbs. (32 kg) 9xxMZi-A CPU - 36 lbs. (16 kg) 9xxSZi-A "Slave" Acquisition Module - 44 lbs. (20 kg) 9CZi-A Master Control Module - 41 lbs. (19 kg) |
Certifications |
|
| Certifications | CE Compliant, UL and cUL listed; conforms to EN 61326, EN 61010-1, UL 61010-1 2nd edition, and CSA C22.2 No. 61010-1-04 |
Warranty and Service |
|
| Warranty and Service | 3-year warranty; calibration
recommended annually. Optional service programs include extended warranty, upgrades, and calibration services. |
LabMaster 9Zi-A 16 GHz Systems スペック
Vertical System |
|
| Analog (ProLink Input) Bandwidth @ 50 Ω (-3 dB) | 16 GHz (≥10 mV/div) |
| Analog (ProBus Input) Bandwidth @ 50 Ω (-3 dB) | For 9xxMZi-A "Master" Acquisition
Module: 3.5 GHz (≥10 mV/div) For 9CZi-A Master Control Module: Not Applicable |
| Analog (ProBus Input) Bandwidth @ 1 MΩ (-3 dB) | For 9xxMZi-A "Master" Acquisition
Module: 500 MHz (typical, ≥2 mV/div) For 9CZi-A Master Control Module: Not Applicable |
| Analog Bandwidth @ 50 Ω (-3 dB) (2.4/2.92 Inputs) | Not Applicable |
| Rise Time (typical, 10-90%, 50 Ω) | 28.5 ps (test limit, flatness mode) |
| Rise Time (typical, 20-80%, 50 Ω) | 21.5 ps (flatness mode) |
| Input Channels | Up to 20, depending on configuration
selected. (Any combination of up to 20 ProLink input channels, or 4 ProBus input channels) |
| Bandwidth Limiters | 20 MHz, 200 MHz, 1 GHz, 4 GHz, 6 GHz, 8 GHz, 13 GHz |
| Input Impedance | ProLink Inputs: 50 Ω+/-2% for ≤100
mV/div, 50 Ω+/-3% for >100 mV/div ProBus Inputs: 50 Ω+/-2% or 1 MΩ||16pF, 10 MΩ || 11 pF with supplied Probe |
| Input Coupling | ProLink Inputs - 50 Ω: DC, GND ProBus Inputs - 1 MΩ: AC, DC, GND; 50 Ω: DC, GND |
| Maximum Input Voltage | 50 Ω (ProLink): ±2 Vmax@≤100mV/div,
5.5Vrms@>100mV/div 50 Ω (ProBus): ±5 Vmax, 3.5 Vrms 1 MΩ (ProBus): 250 V max. (peak AC: < 10 kHz + DC) |
| Channel-Channel Isolation | DC to 10 GHz: 50 dB (>315:1) 10 to 15 GHz: 46 dB (>200:1) 15 to 20 GHz: 40 dB (>100:1) (For any two ProLink input channels, same or different v/div settings, typical) |
| Vertical Resolution | 8 bits; up to 11 bits with enhanced resolution (ERES) |
| Sensitivity | 50 Ω (ProLink): 2 mV-1 V/div, fully
variable (2-9.9 mV/div via zoom) 50 Ω (ProBus): 2 mV-1 V/div, fully variable; 1 MΩ (ProBus): 2 mV-10 V/div, fully variable |
| DC Vertical Gain Accuracy (Gain Component of DC Accuracy) | ±1% F.S. (typical), offset at 0V; ±1.5% F.S. (test limit), offset at 0V |
| Offset Range | 50 Ω (ProLink): ±500 mV @ 2-100 mV/div ±4 V @ >100 mV/div -1 V/div 50 Ω (ProBus): ±750 mV @ 2-100 mV/div ±4 V @ >100 mV/div -1 V/div 1 MΩ: ±1V @ 2-140 mV/div ±10V @ 142mV-1.40V/div ±100V @ 1.42V-10V/div |
| DC Vertical Offset Accuracy | ±(1.5% of offset setting + 1 mV) (test limit) |
Horizontal System |
|
| Timebases | Internal timebase with 10 GHz clock frequency common to all input channels. Single, distributed 10 GHz clock for all channels ensures precise synchronization with timing accuracy between all channels identical to that provided within a single, conventional oscilloscope package. |
| Time/Division Range | 20 ps/div-64 s/div (Real-Time Mode: 20 ps/div - 64 s/div; RIS mode: 20 ps/div - 10 ns/div, user selectable at ≤10ns/div; Roll mode: Not available |
| Clock Accuracy | < 1 ppm + (aging of 0.5ppm/yr from last calibration) |
| Time Interval Accuracy | < 0.06 / SR + (clock accuracy* Reading) (rms) |
| Jitter Noise Floor | For Acq. Length ≤10μs: 225 fsrms (TIE,
typical) For Acq. Length >10μs: 275 fsrms (TIE, typical) |
| Trigger and Interpolator Jitter | <0.1 psrms (typical, software assisted), 2 psrms (typical, hardware), |
| Channel-Channel Deskew Range | ±9 x time/div. setting or 25 ns max. (whichever is larger), each channel |
| External Timebase Reference (Input) | 10 MHz; 50 Ω impedance, applied at the rear input |
| External Timebase Reference (Output) | 10 MHz; 50 Ω impedance, output at the rear |
| External Clock | Not Available |
Acquisition System |
|
| Single-Shot Sample Rate/Ch | 40 GS/s on each channel. (80 GS/s when combining channels using the optional WM8Zi-2X80GS External Interleaving Device) |
| Random Interleaved Sampling (RIS) | 200 GS/s for repetitive signals (20 ps/div to 10 ns/div) |
| Maximum Trigger Rate | 1,000,000 waveforms/second (in Sequence Mode, up to 4 channels) |
| Intersegment Time | 1 μs |
| Memory Options (4 Ch / 2 Ch / 1Ch) | S-32 Option: 32M / 32M / 32M (7,500) M-64 Option: 64M / 64M / 64M (15,000) L-128 Option: 128M / 128M / 128M (15,000) VL-256 Option: 256M / 256M / 256M (15,000) Note: On all memory options, memory and sample Rate can be doubled in half channel mode with use of WM8Zi-2X80GS External Interleaving Device. |
| Standard Memory (4 Ch / 2 Ch / 1Ch) (Number of Segments) | 20 M / 20 M / 20M Memory and Sample Rate can be doubled in half channel mode with use of WM8Zi-2X80GS External Interleaving Device. (2000) |
Acquisition Processing |
|
| Averaging | Summed averaging to 1 million sweeps; continuous averaging to 1 million sweeps |
| Enhanced Resolution (ERES) | From 8.5 to 11 bits vertical resolution |
| Envelope (Extrema) | Envelope, floor, or roof for up to 1 million sweeps |
| Interpolation | Linear or Sin x/x |
Triggering System |
|
| Modes | Normal, Auto, Single, and Stop |
| Sources | Using 9xxMZi-A Master Acquisition
Module: any input channel, Aux, Aux/10, Line, or Fast Edge on
9xxMZi-A, or any input channel (Edge trigger only) on 9xxSZi-A Slave
Acquisition Modules. Using 9CZi-A Master Control Module: Any Ch 1-4 or Fast Edge of the first 9xxSZi-A "Slave" Acquisition Module input, or any input channel (Edge trigger only) on additional 9xxSZi-A Slave Acquisition Modules. Slope and level unique to each source except line trigger. |
| Coupling Mode | DC, AC, HFRej, LFRej |
| Pre-trigger Delay | 0-100% of memory size (adjustable in 1% increments of 100 ns) |
| Post-trigger Delay | 0-10,000 divisions in real time mode, limited at slower time/div settings or in roll mode |
| Hold-off by Time | From 2 ns up to 20 s or from 1 to 99,999,999 events |
| Internal Trigger Range | ±4.1 div from center |
| Trigger Sensitivity with Edge Trigger (Ch 1-4) 2.4/2.92mm Inputs | Not Applicable |
| Trigger Sensitivity with Edge Trigger (Ch 1–4) ProBus Inputs | 2 div @ < 3.5 GHz, 1.5 div @ < 1.75 GHz, 1.0 div @ < 200 MHz, (for DC coupling, ≥ 10 mV/div, 50 Ω ) |
| Trigger Sensitivity with Edge Trigger (Ch 1–4) ProLink Inputs | For 9xxMZi-A "Master" Acquisition
Module or Ch 1-4 of a 9xxSZi-A "Slave" Acquisition Module when used
with a 9CZi-A Master Control Module: 3 div @ < 15 GHz, 1.5 div @ < 3 GHz, 1.0 div @ < 200 MHz, (for DC, AC, LFRej coupling, ≥ 10 mV/div, 50 Ω ) |
| External Trigger Sensitivity, (Edge Trigger) | For 9xxMZi-A "Master" Acquisition
Module or Slave Acquisition Module used with 9CZi-A Master Control
Module: 2 div @ < 1 GHz, 1.5 div @ < 500 MHz, 1.0 div @ < 200 MHz, (for DC coupling) |
| External Trigger Input Range | For 9xxMZi-A "Master" Acquisition Module or Ch 1-4 of a 9xxSZi-A "Slave" Acquisition Module when used with a 9CZi-A Master Control Module: Aux (±0.4 V); Aux/10 (±4 V) |
| Max. Trigger Frequency, SMART Trigger | For 9xxMZi-A "Master" Acquisition
Module or Ch 1-4 of a 9xxSZi-A "Slave" Acquisition Module when used
with a 9CZi-A Master Control Module: 2.0 GHz @ ≥ 10 mV/div (minimum triggerable width 200 ps) |
Basic Triggers |
|
| Edge | Triggers when signal meets slope (positive, negative, or either) and level condition. |
| Window | Triggers when signal exits a window defined by adjustable thresholds |
| TV-Composite Video | Triggers NTSC or PAL with selectable line and field; HDTV (720p, 1080i, 1080p) with selectable frame rate (50 or 60 Hz) and Line; or CUSTOM with selectable Fields (1-8), Lines (up to 2000), Frame Rates (25, 30, 50, or 60 Hz), Interlacing (1:1, 2:1, 4:1, 8:1), or Synch Pulse Slope (Positive or Negative). |
SMART Triggers |
|
| State or Edge Qualified | Triggers on any input source only if a defined state or edge occurred on another input source. Holdoff between sources is selectable by time or events. |
| Qualified First | In Sequence acquisition mode, triggers repeatably on event B only if a defined pattern, state, or edge (event A) is satisfied in the first segment of the acquisition. Holdoff between sources is selectable by time or events. |
| Dropout | Triggers if signal drops out for longer than selected time between 1 ns and 20 s. |
| Pattern | Logic combination (AND, NAND, OR, NOR) of 5 inputs (4 channels and external trigger input). Each source can be high, low, or don't care. The High and Low level can be selected independently. Triggers at start or end of the pattern. |
SMART Triggers with Exclusion Technology |
|
| Glitch | Triggers on positive or negative glitches with widths selectable as low as 200ps to 20 s, or on intermittent faults. |
| Width (Signal or Pattern) | Triggers on positive, negative, or both widths with widths selectable as low as 200ps to 20 s, or on intermittent faults. |
| Interval (Signal or Pattern) | Triggers on intervals selectable between 1 ns and 20 s. |
| Timeout (State/Edge Qualified) | Triggers on any source if a given state
(or transition edge) has occurred on another source. Delay between sources is 1 ns to 20 s, or 1 to 99,999,999 events. |
| Runt | Trigger on positive or negative runts defined by two voltage limits and two time limits. Select between 1 ns and 20 ns. |
| Slew Rate | Trigger on edge rates. Select limits for dV, dt, and slope. Select edge limits between 1 ns and 20 ns. |
| Exclusion Triggering | Trigger on intermittent faults by specifying the expected behavior and triggering when that condition is not met |
Cascade (Sequence) Triggering |
|
| Capability | Arm on "A" event, then Trigger on "B" event. Or Arm on "A" event, then Qualify on "B" event, and Trigger on "C" event. Or Arm on "A" event, then Qualify on "B" then "C" event, and Trigger on "D" event |
| Types | A, B, C, or D event: Edge, Glitch, Width, Window, Dropout, Interval, Runt, Slew Rate, or Pattern (analog) |
| Holdoff | Holdoff between A and B, B and C, C or D, or any is selectable by time or number of events |
| Reset | Reset between A and B, B and C, C and D, or any combination is selectable in time or number of events |
High Speed Serial Protocol Triggering |
|
| Data Rates | (Option LM9Zi-HSPT, for signals connected to 9xxMZi-A "Master" Acquisition Module Channel 4 input) 100 Mb/s - 2.7 Gb/s, 3.0, 3.125 Gb/s |
| Pattern Length | 80 bits, NRZ or 8b10b |
| Clock and Data Outputs | 400mVp-p (typical) AC coupled |
| Clock Recovery Jitter | 2 psrms + 0.3% Unit Interval rms for PRBS data patterns with 50% transition density (typical) |
| Hardware Clock Recovery Loop BW | PLL Loop BW = Fbaud/5500, 100 Mb/s to 2.488 Gb/s (typical) |
Low Speed Serial Protocol Triggering (Optional) |
|
| Optionally available | I2C, SPI (SPI, SSPI, SIOP), UART-RS232, CAN, LIN, FlexRay, I2S (Audio), MIL-1553 |
Color Waveform Display |
|
| Type | On 9xxMZi-A "Master" Acquisition Module or 9CZi-A Master Control Module: Color 15.3" flat panel TFT-Active Matrix LCD with high resolution touch screen |
| Resolution | WXGA; 1280 x 768 pixels. |
| Number of traces | Display a maximum of 40 traces. Simultaneously display channel, zoom, memory and math traces. |
| Grid Styles | Auto, Single, Dual, Quad, Octal, X-Y, Single+X-Y, Dual+X-Y, Twelve, Sixteen, Twenty |
| Waveform Representation | Sample dots joined, or sample dots only |
Internal Waveform Memory |
|
| Internal Waveform Memory | 4 active waveform memory traces (M1-M4) store 16 bit/point full length waveforms. Waveforms can be stored to any number of files limited only by the data storage media capacity. |
LeCroy WaveStream™ Fast Viewing Mode |
|
| Intensity | 256 Intensity Levels, 1-100% adjustable via front panel control |
| Types | Select analog or color-graded |
| Number of Channels | up to 20 simultaneously |
| Max Sampling Rate | 40 GS/s (80 GS/s with optional WM8Zi-2X80GS external interleaving device) |
| Persistence Aging | Select from 500 ms to Infinity |
| Waveforms/second (continuous) | up to 2500 Waveforms/second |
| Operation | Front panel toggle between WaveStream ON (Analog), ON (Color) and OFF |
Automatic Setup |
|
| Auto Setup | Automatically sets timebase, trigger, and sensitivity to display a wide range of repetitive signals |
| Find Vertical Scale | Automatically sets the vertical sensitivity and offset for the selected channel to display a waveform with the maximum dynamic range |
Probes |
|
| Probes | 9xxMZi-A Models: Acquisition Module:
Qty. (4) ÷10 Passive Probes 9xxSZi-A and 9CZi-A Models: No passive probes supplied |
| Probing System | 9xxMZi-A "Master" Acquisition Module:
Probus and ProLink. 9xxSZi-A "Slave" Acquisition Module: ProLink. Automatically detects and supports a variety of compatible probes. |
| Scale Factors | Automatically or manually selected depending on probe used |
| Calibration Output | 9xxMZi-A "Master" Acquisition Module: 1kHz square wave, 1Vp-p (typical), output to probe hook |
Integrated Second Display |
|
| Type | Color 15.3" flat panel TFT-Active
Matrix LCD with high resolution touch screen. Requires ordering of option LM9Zi-VIDEOCARD-Zi-EXTDISP-15 to replace the standard video card in the LabMaster CPU or LabMaster 9CZi-A Master Control Module, so performance described in "External Monitor Port" is no longer provided. DVI and power connector provided to support LeCroy Zi-EXTDISP-15 additional touch screen display accessory. Includes support for extended desktop operation. |
| Resolution | WXGA; 1280 x 768 pixels |
Analog Persistence Display |
|
| Analog and Color-Graded Persistence | Variable saturation levels; stores each trace's persistence data in memory |
| Trace Selection | Activate persistence on all or any combination of traces |
| Sweep Display Modes | All accumulated, or all accumulated with last trace highlighted |
| Persistence Types | Select analog, color, or three-dimensional |
| Persistence Aging | Select from 500 ms to infinity |
High Speed Digitizer Output (Option) |
|
| Type | Option LSIB-1. Installs in LabMaster 9xxMZi-A CPU or LabMaster 9CZi-A Master Control Module and uses one available PCIe slot normally used by a 9xxSZi-A module. |
| Transfer Rate | up to 325 MB/s (typical) |
| Output Protocol | PCI Express, Gen 1 (4 lanes utilized for data transfer) |
| Control Protocol | TCP/IP |
| Command Set | Via Windows Automation, or via LeCroy Remote Command Set |
Processor/CPU |
|
| Type | In 9xxMZi-A CPU or 9CZi-A Master Control Module: Intel® XeonTM X5660 2.8 GHz (or better). There are two processors in each CPU, and each processor has 6 cores for a total of 12 cores and an effective processor speed of 33.6 GHz. |
| Processor Memory | 24 GB standard. Up to 192 GB optionally available. |
| Operating System | Microsoft Windows® 7 Professional Edition (64-bit) |
| Real Time Clock | Date and time displayed with waveform in hardcopy files. SNTP support to synchronize to precision internal clocks. |
Zoom Expansion Traces |
|
| Zoom Expansion Traces | Display up to 20 channels and up to 4 Memory, 8 Math, and 4 Zoom traces |
Setup Storage |
|
| Front Panel and Instrument Status | Store to the internal hard drive, over a network, or to a USB-connected peripheral device. |
Interface |
|
| Remote Control | Via Windows Automation, or via LeCroy Remote Command Set |
| Network Communication Standard | VXI-11 or VICP, LXI Class C (v1.2) Compliant |
| GPIB Port (optional) | Supports IEEE - 488.2. Installs in LabMaster 9xxMZi-A CPU or 9CZi-A Master Control Module and uses one available PCIe slot normally used by a 9xxSZi-A module. |
| LSIB Port (optional) | Supports PCIe Gen1 x4 protocol with LeCroy supplied API. Installs in LabMaster 9xxMZi-A CPU or 9CZi-A Master Control Module and uses one available PCIe slot normally used by a 9xxSZi-A module. |
| Ethernet Port | Supports 10/100/1000BaseT Ethernet interface (RJ45 port) |
| USB Ports | 9xxMZi-A CPU or 9CZi-A Master Control
Module: minimum 2 total USB 2.0 ports on reare of unit to support
Windows compatible devices 9xxMZi "Master" Acquisition Module or 9CZi-A Master Control Module: minimum 3 total USB 2.0 ports on front of unit to support Windows compatible devices. |
| External Monitor Port | In 9xxMZi-A CPU or 9CZi-A Master
Control Module: Dual Link DVI compatible to support internal display or internal display on 9xxMZi-A "Master" Acquisition Module (1280 x 768 pixel resolution) or customer-supplied monitor with up to WQXGA (2560 x 1600 pixel) resolution. 15 pin D-Type WXGA compatible to support customer-supplied external monitor. Only one monitor can operate at a time. |
| Serial Port | Not Available |
| Peripheral Bus | Not Available |
Auxiliary Input |
|
| Signal Types | For External Trigger Input. Located in 9xxMZi-A "Master" Acquisition Module or Slave Acquisition Module #1 (rear-mounted BNC, 50 Ω) used with 9CZi-A Master Control Module. |
| Coupling | 9xxMZi-A "Master" Acquisition Module:
50 Ω: DC; 1 MΩ: AC, DC, GND 9CZi-A Master Control Module: 50 Ω only |
| Max. Input Voltage | 5 Vrms (50 Ω); 250 V (Peak AC < 10 kHz + DC) (1 MΩ) |
Auxiliary Output |
|
| Connector Type | BNC, located on front of 9xxMZi-A "Master" Acquisition Module |
| Signal Types | 9xxMZi-A "Master" Acquisition Module:
Select from calibrator, control signals or Off (Not available with 9CZi-A Master Control Module) |
| Output Signal | 500 Hz-5 MHz square wave or DC level; 0.0 to 500 mV into 50 Ω (0-1 V into 1 MΩ) |
| Control Signals | Trigger enabled, trigger out, pass/fail status, off |
General |
|
| Auto Calibration | Ensures specified DC and timing accuracy is maintained for 1 year minimum. |
Power Requirements |
|
| Voltage | LabMaster 9xxMZi-A "Master" Acquisition
Module and 9xxSZi-A: 100-240 VAC ±10% at 45-66 Hz; 100-120 VAC ±10%
at 380-420 Hz; Automatic AC Voltage Selection, Installation Category
II LabMaster 9xxMZi-A CPU: 100-240 VAC ±10% at 45-66 Hz; Automatic AC Voltage Selection, Installation Category II LabMaster 9CZi-A Master Control Module: 100–240 VAC ±10% at 45-66 Hz; Automatic AC Voltage Selection, Installation Category II |
| Max. Power Consumption | 9xxMZi-A "Master" Acquisition Module -
850 W / 850 VA. 9xxMZi-A CPU - 400 W / 400 VA. 9xxSZi-A "Slave" Acquisition Module - 700 W / 700 VA. 9CZi-A Master Control Module - 450 W / 450 VA. Each Module has a separate power cord. |
Environmental and Safety |
|
| Temperature (Operating) | +5 °C to +40 °C |
| Temperature (Non-Operating) | -20 °C to +60 °C |
| Humidity (Operating) | 5% to 80% relative humidity
(non-condensing) up to +31 °C. Upper limit derates to 50% relative humidity (non-condensing) at +40 °C. |
| Humidity (Non-Operating) | 5% to 95% relative humidity (non-condensing) as tested per MIL-PRF-28800F |
| Altitude (Operating) | Up to 10,000 ft. (3048 m) at or below +25 °C |
| Altitude (Non-Operating) | Up to 40,000 ft. (12,192 m) |
| Random Vibration (Operating) | 0.5 grms 5 Hz to 500 Hz, 15 minutes in each of three orthogonal axes |
| Random Vibration (Non-Operating) | 2.4 grms 5 Hz to 500 Hz, 15 minutes in each of three orthogonal axes |
| Functional Shock | 20 g peak, half sine, 11 ms pulse, 3 shocks (positive and negative) in each of three orthogonal axes, 18 shocks total |
Physical Dimensions |
|
| Dimensions (HWD) | 9xxMZi-A "Master" Acquisition Module
and 9CZi-A Master Control Module - 14"H x 18.4"W x 16"D (355 x 467 x
406 mm). 9xxMZi-A CPU - 5.7"H x 18.2"W x 20.8"D (145mm x 462mm x 527mm). 9xxSZi-A "Slave" Acquisition Module - 7"H x 18.2"W x 20.8"D (177mm x 462mm x 527mm). |
| Weight | 9xxMZi-A "Master" Acquisition Module -
48 lbs. (22 kg) 9xxMZi-A CPU - 29 lbs. (13 kg) 9xxSZi-A "Slave" Acquisition Module - 37 lbs. (17 kg) 9CZi-A Master Control Module - 41 lbs. (19 kg) |
| Shipping Weight | 9xxMZi-A "Master" Acquisition Module -
70 lbs. (32 kg) 9xxMZi-A CPU - 36 lbs. (16 kg) 9xxSZi-A "Slave" Acquisition Module - 44 lbs. (20 kg) 9CZi-A Master Control Module - 41 lbs. (19 kg) |
Certifications |
|
| Certifications | CE Compliant, UL and cUL listed; conforms to EN 61326, EN 61010-1, UL 61010-1 2nd edition, and CSA C22.2 No. 61010-1-04 |
Warranty and Service |
|
| Warranty and Service | 3-year warranty; calibration
recommended annually. Optional service programs include extended warranty, upgrades, and calibration services. |
LabMaster 9Zi-A 20 GHz Systems スペック
Vertical System |
|
| Analog (ProLink Input) Bandwidth @ 50 Ω (-3 dB) | 20 GHz (≥10 mV/div) |
| Analog (ProBus Input) Bandwidth @ 50 Ω (-3 dB) | For 9xxMZi-A "Master" Acquisition
Module: 3.5 GHz (≥10 mV/div) For 9CZi-A Master Control Module: Not Applicable |
| Analog (ProBus Input) Bandwidth @ 1 MΩ (-3 dB) | For 9xxMZi-A "Master" Acquisition
Module: 500 MHz (typical, ≥2 mV/div) For 9CZi-A Master Control Module: Not Applicable |
| Analog Bandwidth @ 50 Ω (-3 dB) (2.4/2.92 Inputs) | Not Applicable |
| Rise Time (typical, 10-90%, 50 Ω) | 22 ps (test limit, flatness mode) |
| Rise Time (typical, 20-80%, 50 Ω) | 16.5 ps (flatness mode) |
| Input Channels | Up to 20, depending on configuration
selected. (Any combination of up to 20 ProLink input channels, or 4 ProBus input channels) |
| Bandwidth Limiters | 20 MHz, 200 MHz, 1 GHz, 4 GHz, 6 GHz, 8 GHz, 13 GHz, 16 GHz |
| Input Impedance | ProLink Inputs: 50 Ω+/-2% for ≤100
mV/div, 50 Ω+/-3% for >100 mV/div ProBus Inputs: 50 Ω+/-2% or 1 MΩ||16pF, 10 MΩ || 11 pF with supplied Probe |
| Input Coupling | ProLink Inputs - 50 Ω: DC, GND ProBus Inputs - 1 MΩ: AC, DC, GND; 50 Ω: DC, GND |
| Maximum Input Voltage | 50 Ω (ProLink): ±2 Vmax@≤100mV/div,
5.5Vrms@>100mV/div 50 Ω (ProBus): ±5 Vmax, 3.5 Vrms 1 MΩ (ProBus): 250 V max. (peak AC: < 10 kHz + DC) |
| Channel-Channel Isolation | DC to 10 GHz: 50 dB (>315:1) 10 to 15 GHz: 46 dB (>200:1) 15 to 20 GHz: 40 dB (>100:1) (For any two ProLink input channels, same or different v/div settings, typical) |
| Vertical Resolution | 8 bits; up to 11 bits with enhanced resolution (ERES) |
| Sensitivity | 50 Ω (ProLink): 2 mV-1 V/div, fully
variable (2-9.9 mV/div via zoom) 50 Ω (ProBus): 2 mV-1 V/div, fully variable; 1 MΩ (ProBus): 2 mV-10 V/div, fully variable |
| DC Vertical Gain Accuracy (Gain Component of DC Accuracy) | ±1% F.S. (typical), offset at 0V; ±1.5% F.S. (test limit), offset at 0V |
| Offset Range | 50 Ω (ProLink): ±500 mV @ 2-100 mV/div ±4 V @ >100 mV/div -1 V/div 50 Ω (ProBus): ±750 mV @ 2-100 mV/div ±4 V @ >100 mV/div -1 V/div 1 MΩ: ±1V @ 2-140 mV/div ±10V @ 142mV-1.40V/div ±100V @ 1.42V-10V/div |
| DC Vertical Offset Accuracy | ±(1.5% of offset setting + 1 mV) (test limit) |
Horizontal System |
|
| Timebases | Internal timebase with 10 GHz clock frequency common to all input channels. Single, distributed 10 GHz clock for all channels ensures precise synchronization with timing accuracy between all channels identical to that provided within a single, conventional oscilloscope package. |
| Time/Division Range | 20 ps/div-64 s/div (Real-Time Mode: 20 ps/div - 64 s/div; RIS mode: 20 ps/div - 10 ns/div, user selectable at ≤10ns/div; Roll mode: Not available |
| Clock Accuracy | < 1 ppm + (aging of 0.5ppm/yr from last calibration) |
| Time Interval Accuracy | < 0.06 / SR + (clock accuracy* Reading) (rms) |
| Jitter Noise Floor | For Acq. Length ≤10μs: 190 fsrms (TIE,
typical) For Acq. Length >10μs: 240 fsrms (TIE, typical) |
| Trigger and Interpolator Jitter | <0.1 psrms (typical, software assisted), 2 psrms (typical, hardware), |
| Channel-Channel Deskew Range | ±9 x time/div. setting or 25 ns max. (whichever is larger), each channel |
| External Timebase Reference (Input) | 10 MHz; 50 Ω impedance, applied at the rear input |
| External Timebase Reference (Output) | 10 MHz; 50 Ω impedance, output at the rear |
| External Clock | Not Available |
Acquisition System |
|
| Single-Shot Sample Rate/Ch | 40 GS/s on each channel. (80 GS/s when combining channels using the optional WM8Zi-2X80GS External Interleaving Device) |
| Random Interleaved Sampling (RIS) | 200 GS/s for repetitive signals (20 ps/div to 10 ns/div) |
| Maximum Trigger Rate | 1,000,000 waveforms/second (in Sequence Mode, up to 4 channels) |
| Intersegment Time | 1 μs |
| Memory Options (4 Ch / 2 Ch / 1Ch) | S-32 Option: 32M / 32M / 32M (7,500) M-64 Option: 64M / 64M / 64M (15,000) L-128 Option: 128M / 128M / 128M (15,000) VL-256 Option: 256M / 256M / 256M (15,000) Note: On all memory options, memory and sample Rate can be doubled in half channel mode with use of WM8Zi-2X80GS External Interleaving Device. |
| Standard Memory (4 Ch / 2 Ch / 1Ch) (Number of Segments) | 20 M / 20 M / 20M Memory and Sample Rate can be doubled in half channel mode with use of WM8Zi-2X80GS External Interleaving Device. (2000) |
Acquisition Processing |
|
| Averaging | Summed averaging to 1 million sweeps; continuous averaging to 1 million sweeps |
| Enhanced Resolution (ERES) | From 8.5 to 11 bits vertical resolution |
| Envelope (Extrema) | Envelope, floor, or roof for up to 1 million sweeps |
| Interpolation | Linear or Sin x/x |
Triggering System |
|
| Modes | Normal, Auto, Single, and Stop |
| Sources | Using 9xxMZi-A Master Acquisition
Module: any input channel, Aux, Aux/10, Line, or Fast Edge on
9xxMZi-A, or any input channel (Edge trigger only) on 9xxSZi-A Slave
Acquisition Modules. Using 9CZi-A Master Control Module: Any Ch 1-4 or Fast Edge of the first 9xxSZi-A "Slave" Acquisition Module input, or any input channel (Edge trigger only) on additional 9xxSZi-A Slave Acquisition Modules. Slope and level unique to each source except line trigger. |
| Coupling Mode | DC, AC, HFRej, LFRej |
| Pre-trigger Delay | 0-100% of memory size (adjustable in 1% increments of 100 ns) |
| Post-trigger Delay | 0-10,000 divisions in real time mode, limited at slower time/div settings or in roll mode |
| Hold-off by Time | From 2 ns up to 20 s or from 1 to 99,999,999 events |
| Internal Trigger Range | ±4.1 div from center |
| Trigger Sensitivity with Edge Trigger (Ch 1-4) 2.4/2.92mm Inputs | Not Applicable |
| Trigger Sensitivity with Edge Trigger (Ch 1–4) ProBus Inputs | 2 div @ < 3.5 GHz, 1.5 div @ < 1.75 GHz, 1.0 div @ < 200 MHz, (for DC coupling, ≥ 10 mV/div, 50 Ω ) |
| Trigger Sensitivity with Edge Trigger (Ch 1–4) ProLink Inputs | For 9xxMZi-A "Master" Acquisition
Module or Ch 1-4 of a 9xxSZi-A "Slave" Acquisition Module when used
with a 9CZi-A Master Control Module: 3 div @ < 15 GHz, 1.5 div @ < 3 GHz, 1.0 div @ < 200 MHz, (for DC, AC, LFRej coupling, ≥ 10 mV/div, 50 Ω ) |
| External Trigger Sensitivity, (Edge Trigger) | For 9xxMZi-A "Master" Acquisition
Module or Slave Acquisition Module used with 9CZi-A Master Control
Module: 2 div @ < 1 GHz, 1.5 div @ < 500 MHz, 1.0 div @ < 200 MHz, (for DC coupling) |
| External Trigger Input Range | For 9xxMZi-A "Master" Acquisition Module or Ch 1-4 of a 9xxSZi-A "Slave" Acquisition Module when used with a 9CZi-A Master Control Module: Aux (±0.4 V); Aux/10 (±4 V) |
| Max. Trigger Frequency, SMART Trigger | For 9xxMZi-A "Master" Acquisition
Module or Ch 1-4 of a 9xxSZi-A "Slave" Acquisition Module when used
with a 9CZi-A Master Control Module: 2.0 GHz @ ≥ 10 mV/div (minimum triggerable width 200 ps) |
Basic Triggers |
|
| Edge | Triggers when signal meets slope (positive, negative, or either) and level condition. |
| Window | Triggers when signal exits a window defined by adjustable thresholds |
| TV-Composite Video | Triggers NTSC or PAL with selectable line and field; HDTV (720p, 1080i, 1080p) with selectable frame rate (50 or 60 Hz) and Line; or CUSTOM with selectable Fields (1-8), Lines (up to 2000), Frame Rates (25, 30, 50, or 60 Hz), Interlacing (1:1, 2:1, 4:1, 8:1), or Synch Pulse Slope (Positive or Negative). |
SMART Triggers |
|
| State or Edge Qualified | Triggers on any input source only if a defined state or edge occurred on another input source. Holdoff between sources is selectable by time or events. |
| Qualified First | In Sequence acquisition mode, triggers repeatably on event B only if a defined pattern, state, or edge (event A) is satisfied in the first segment of the acquisition. Holdoff between sources is selectable by time or events. |
| Dropout | Triggers if signal drops out for longer than selected time between 1 ns and 20 s. |
| Pattern | Logic combination (AND, NAND, OR, NOR) of 5 inputs (4 channels and external trigger input). Each source can be high, low, or don't care. The High and Low level can be selected independently. Triggers at start or end of the pattern. |
SMART Triggers with Exclusion Technology |
|
| Glitch | Triggers on positive or negative glitches with widths selectable as low as 200ps to 20 s, or on intermittent faults. |
| Width (Signal or Pattern) | Triggers on positive, negative, or both widths with widths selectable as low as 200ps to 20 s, or on intermittent faults. |
| Interval (Signal or Pattern) | Triggers on intervals selectable between 1 ns and 20 s. |
| Timeout (State/Edge Qualified) | Triggers on any source if a given state
(or transition edge) has occurred on another source. Delay between sources is 1 ns to 20 s, or 1 to 99,999,999 events. |
| Runt | Trigger on positive or negative runts defined by two voltage limits and two time limits. Select between 1 ns and 20 ns. |
| Slew Rate | Trigger on edge rates. Select limits for dV, dt, and slope. Select edge limits between 1 ns and 20 ns. |
| Exclusion Triggering | Trigger on intermittent faults by specifying the expected behavior and triggering when that condition is not met |
Cascade (Sequence) Triggering |
|
| Capability | Arm on "A" event, then Trigger on "B" event. Or Arm on "A" event, then Qualify on "B" event, and Trigger on "C" event. Or Arm on "A" event, then Qualify on "B" then "C" event, and Trigger on "D" event |
| Types | A, B, C, or D event: Edge, Glitch, Width, Window, Dropout, Interval, Runt, Slew Rate, or Pattern (analog) |
| Holdoff | Holdoff between A and B, B and C, C or D, or any is selectable by time or number of events |
| Reset | Reset between A and B, B and C, C and D, or any combination is selectable in time or number of events |
High Speed Serial Protocol Triggering |
|
| Data Rates | (Option LM9Zi-HSPT, for signals connected to 9xxMZi-A "Master" Acquisition Module Channel 4 input) 100 Mb/s - 2.7 Gb/s, 3.0, 3.125 Gb/s |
| Pattern Length | 80 bits, NRZ or 8b10b |
| Clock and Data Outputs | 400mVp-p (typical) AC coupled |
| Clock Recovery Jitter | 2 psrms + 0.3% Unit Interval rms for PRBS data patterns with 50% transition density (typical) |
| Hardware Clock Recovery Loop BW | PLL Loop BW = Fbaud/5500, 100 Mb/s to 2.488 Gb/s (typical) |
Low Speed Serial Protocol Triggering (Optional) |
|
| Optionally available | I2C, SPI (SPI, SSPI, SIOP), UART-RS232, CAN, LIN, FlexRay, I2S (Audio), MIL-1553 |
Color Waveform Display |
|
| Type | On 9xxMZi-A "Master" Acquisition Module or 9CZi-A Master Control Module: Color 15.3" flat panel TFT-Active Matrix LCD with high resolution touch screen |
| Resolution | WXGA; 1280 x 768 pixels. |
| Number of traces | Display a maximum of 40 traces. Simultaneously display channel, zoom, memory and math traces. |
| Grid Styles | Auto, Single, Dual, Quad, Octal, X-Y, Single+X-Y, Dual+X-Y, Twelve, Sixteen, Twenty |
| Waveform Representation | Sample dots joined, or sample dots only |
Internal Waveform Memory |
|
| Internal Waveform Memory | 4 active waveform memory traces (M1-M4) store 16 bit/point full length waveforms. Waveforms can be stored to any number of files limited only by the data storage media capacity. |
LeCroy WaveStream™ Fast Viewing Mode |
|
| Intensity | 256 Intensity Levels, 1-100% adjustable via front panel control |
| Types | Select analog or color-graded |
| Number of Channels | up to 20 simultaneously |
| Max Sampling Rate | 40 GS/s (80 GS/s with optional WM8Zi-2X80GS external interleaving device) |
| Persistence Aging | Select from 500 ms to Infinity |
| Waveforms/second (continuous) | up to 2500 Waveforms/second |
| Operation | Front panel toggle between WaveStream ON (Analog), ON (Color) and OFF |
Automatic Setup |
|
| Auto Setup | Automatically sets timebase, trigger, and sensitivity to display a wide range of repetitive signals |
| Find Vertical Scale | Automatically sets the vertical sensitivity and offset for the selected channel to display a waveform with the maximum dynamic range |
Probes |
|
| Probes | 9xxMZi-A Models: Acquisition Module:
Qty. (4) ÷10 Passive Probes 9xxSZi-A and 9CZi-A Models: No passive probes supplied |
| Probing System | 9xxMZi-A "Master" Acquisition Module:
Probus and ProLink. 9xxSZi-A "Slave" Acquisition Module: ProLink. Automatically detects and supports a variety of compatible probes. |
| Scale Factors | Automatically or manually selected depending on probe used |
| Calibration Output | 9xxMZi-A "Master" Acquisition Module: 1kHz square wave, 1Vp-p (typical), output to probe hook |
Integrated Second Display |
|
| Type | Color 15.3" flat panel TFT-Active
Matrix LCD with high resolution touch screen. Requires ordering of option LM9Zi-VIDEOCARD-Zi-EXTDISP-15 to replace the standard video card in the LabMaster CPU or LabMaster 9CZi-A Master Control Module, so performance described in "External Monitor Port" is no longer provided. DVI and power connector provided to support LeCroy Zi-EXTDISP-15 additional touch screen display accessory. Includes support for extended desktop operation. |
| Resolution | WXGA; 1280 x 768 pixels |
Analog Persistence Display |
|
| Analog and Color-Graded Persistence | Variable saturation levels; stores each trace's persistence data in memory |
| Trace Selection | Activate persistence on all or any combination of traces |
| Sweep Display Modes | All accumulated, or all accumulated with last trace highlighted |
| Persistence Types | Select analog, color, or three-dimensional |
| Persistence Aging | Select from 500 ms to infinity |
High Speed Digitizer Output (Option) |
|
| Type | Option LSIB-1. Installs in LabMaster 9xxMZi-A CPU or LabMaster 9CZi-A Master Control Module and uses one available PCIe slot normally used by a 9xxSZi-A module. |
| Transfer Rate | up to 325 MB/s (typical) |
| Output Protocol | PCI Express, Gen 1 (4 lanes utilized for data transfer) |
| Control Protocol | TCP/IP |
| Command Set | Via Windows Automation, or via LeCroy Remote Command Set |
Processor/CPU |
|
| Type | In 9xxMZi-A CPU or 9CZi-A Master Control Module: Intel® XeonTM X5660 2.8 GHz (or better). There are two processors in each CPU, and each processor has 6 cores for a total of 12 cores and an effective processor speed of 33.6 GHz. |
| Processor Memory | 24 GB standard. Up to 192 GB optionally available. |
| Operating System | Microsoft Windows® 7 Professional Edition (64-bit) |
| Real Time Clock | Date and time displayed with waveform in hardcopy files. SNTP support to synchronize to precision internal clocks. |
Zoom Expansion Traces |
|
| Zoom Expansion Traces | Display up to 20 channels and up to 4 Memory, 8 Math, and 4 Zoom traces |
Setup Storage |
|
| Front Panel and Instrument Status | Store to the internal hard drive, over a network, or to a USB-connected peripheral device. |
Interface |
|
| Remote Control | Via Windows Automation, or via LeCroy Remote Command Set |
| Network Communication Standard | VXI-11 or VICP, LXI Class C (v1.2) Compliant |
| GPIB Port (optional) | Supports IEEE - 488.2. Installs in LabMaster 9xxMZi-A CPU or 9CZi-A Master Control Module and uses one available PCIe slot normally used by a 9xxSZi-A module. |
| LSIB Port (optional) | Supports PCIe Gen1 x4 protocol with LeCroy supplied API. Installs in LabMaster 9xxMZi-A CPU or 9CZi-A Master Control Module and uses one available PCIe slot normally used by a 9xxSZi-A module. |
| Ethernet Port | Supports 10/100/1000BaseT Ethernet interface (RJ45 port) |
| USB Ports | 9xxMZi-A CPU or 9CZi-A Master Control
Module: minimum 2 total USB 2.0 ports on reare of unit to support
Windows compatible devices 9xxMZi "Master" Acquisition Module or 9CZi-A Master Control Module: minimum 3 total USB 2.0 ports on front of unit to support Windows compatible devices. |
| External Monitor Port | In 9xxMZi-A CPU or 9CZi-A Master
Control Module: Dual Link DVI compatible to support internal display or internal display on 9xxMZi-A "Master" Acquisition Module (1280 x 768 pixel resolution) or customer-supplied monitor with up to WQXGA (2560 x 1600 pixel) resolution. 15 pin D-Type WXGA compatible to support customer-supplied external monitor. Only one monitor can operate at a time. |
| Serial Port | Not Available |
| Peripheral Bus | Not Available |
Auxiliary Input |
|
| Signal Types | For External Trigger Input. Located in 9xxMZi-A "Master" Acquisition Module or Slave Acquisition Module #1 (rear-mounted BNC, 50 Ω) used with 9CZi-A Master Control Module. |
| Coupling | 9xxMZi-A "Master" Acquisition Module:
50 Ω: DC; 1 MΩ: AC, DC, GND 9CZi-A Master Control Module: 50 Ω only |
| Max. Input Voltage | 5 Vrms (50 Ω); 250 V (Peak AC < 10 kHz + DC) (1 MΩ) |
Auxiliary Output |
|
| Connector Type | BNC, located on front of 9xxMZi-A "Master" Acquisition Module |
| Signal Types | 9xxMZi-A "Master" Acquisition Module:
Select from calibrator, control signals or Off (Not available with 9CZi-A Master Control Module) |
| Output Signal | 500 Hz-5 MHz square wave or DC level; 0.0 to 500 mV into 50 Ω (0-1 V into 1 MΩ) |
| Control Signals | Trigger enabled, trigger out, pass/fail status, off |
General |
|
| Auto Calibration | Ensures specified DC and timing accuracy is maintained for 1 year minimum. |
Power Requirements |
|
| Voltage | LabMaster 9xxMZi-A "Master" Acquisition
Module and 9xxSZi-A: 100-240 VAC ±10% at 45-66 Hz; 100-120 VAC ±10%
at 380-420 Hz; Automatic AC Voltage Selection, Installation Category
II LabMaster 9xxMZi-A CPU: 100-240 VAC ±10% at 45-66 Hz; Automatic AC Voltage Selection, Installation Category II LabMaster 9CZi-A Master Control Module: 100–240 VAC ±10% at 45-66 Hz; Automatic AC Voltage Selection, Installation Category II |
| Max. Power Consumption | 9xxMZi-A "Master" Acquisition Module -
850 W / 850 VA. 9xxMZi-A CPU - 400 W / 400 VA. 9xxSZi-A "Slave" Acquisition Module - 700 W / 700 VA. 9CZi-A Master Control Module - 450 W / 450 VA. Each Module has a separate power cord. |
Environmental and Safety |
|
| Temperature (Operating) | +5 °C to +40 °C |
| Temperature (Non-Operating) | -20 °C to +60 °C |
| Humidity (Operating) | 5% to 80% relative humidity
(non-condensing) up to +31 °C. Upper limit derates to 50% relative humidity (non-condensing) at +40 °C. |
| Humidity (Non-Operating) | 5% to 95% relative humidity (non-condensing) as tested per MIL-PRF-28800F |
| Altitude (Operating) | Up to 10,000 ft. (3048 m) at or below +25 °C |
| Altitude (Non-Operating) | Up to 40,000 ft. (12,192 m) |
| Random Vibration (Operating) | 0.5 grms 5 Hz to 500 Hz, 15 minutes in each of three orthogonal axes |
| Random Vibration (Non-Operating) | 2.4 grms 5 Hz to 500 Hz, 15 minutes in each of three orthogonal axes |
| Functional Shock | 20 g peak, half sine, 11 ms pulse, 3 shocks (positive and negative) in each of three orthogonal axes, 18 shocks total |
Physical Dimensions |
|
| Dimensions (HWD) | 9xxMZi-A "Master" Acquisition Module
and 9CZi-A Master Control Module - 14"H x 18.4"W x 16"D (355 x 467 x
406 mm). 9xxMZi-A CPU - 5.7"H x 18.2"W x 20.8"D (145mm x 462mm x 527mm). 9xxSZi-A "Slave" Acquisition Module - 7"H x 18.2"W x 20.8"D (177mm x 462mm x 527mm). |
| Weight | 9xxMZi-A "Master" Acquisition Module -
48 lbs. (22 kg) 9xxMZi-A CPU - 29 lbs. (13 kg) 9xxSZi-A "Slave" Acquisition Module - 37 lbs. (17 kg) 9CZi-A Master Control Module - 41 lbs. (19 kg) |
| Shipping Weight | 9xxMZi-A "Master" Acquisition Module -
70 lbs. (32 kg) 9xxMZi-A CPU - 36 lbs. (16 kg) 9xxSZi-A "Slave" Acquisition Module - 44 lbs. (20 kg) 9CZi-A Master Control Module - 41 lbs. (19 kg) |
Certifications |
|
| Certifications | CE Compliant, UL and cUL listed; conforms to EN 61326, EN 61010-1, UL 61010-1 2nd edition, and CSA C22.2 No. 61010-1-04 |
Warranty and Service |
|
| Warranty and Service | 3-year warranty; calibration
recommended annually. Optional service programs include extended warranty, upgrades, and calibration services. |
LabMaster 9Zi-A 30 GHz Systems スペック
Vertical System |
|
| Analog (ProLink Input) Bandwidth @ 50 Ω (-3 dB) | 20 GHz (≥10 mV/div) |
| Analog (ProBus Input) Bandwidth @ 50 Ω (-3 dB) | For 9xxMZi-A "Master" Acquisition
Module: 3.5 GHz (≥10 mV/div) For 9CZi-A Master Control Module: Not Applicable |
| Analog (ProBus Input) Bandwidth @ 1 MΩ (-3 dB) | For 9xxMZi-A "Master" Acquisition
Module: 500 MHz (typical, ≥2 mV/div) For 9CZi-A Master Control Module: Not Applicable |
| Analog Bandwidth @ 50 Ω (-3 dB) (2.4/2.92 Inputs) | 30 GHz |
| Rise Time (typical, 10-90%, 50 Ω) | 15.5 ps (test limit, flatness mode) |
| Rise Time (typical, 20-80%, 50 Ω) | 11.5 ps (flatness mode) |
| Input Channels | Up to 10 @ 30 GHz. Up to 20 @ 20 GHz (Any combination of 20 GHz ProLink inputs or 2 ProBus input channels). Max number of channels depends on configuration selected. |
| Bandwidth Limiters | For ≤20 GHz Mode: 20 MHz, 200 MHz, 1
GHz, 4 GHz, 6 GHz, 8 GHz, 13 GHz, 16 GHz For >20 GHz Mode: 20 GHz, 25 GHz |
| Input Impedance | 2.92mm Inputs: 50 Ω+/-2% for ≤79
mV/div, 50 Ω+/-3% for >79 mV/div ProLink Inputs: 50 Ω+/-2% for ≤100 mV/div, 50 Ω+/-3% for >100 mV/div ProBus Inputs: 50 Ω+/-2% or 1 MΩ||16pF, 10 MΩ || 11 pF with supplied Probe |
| Input Coupling | 2.92 mm Inputs: 50 Ω: DC, GND ProLink Inputs - 50 Ω: DC, GND ProBus Inputs - 1 MΩ: AC, DC, GND; 50 Ω: DC, GND |
| Maximum Input Voltage | 2.92 mm Inputs: ±2 Vmax@≤100mV/div,
5.5Vrms@>100mV/div 50 Ω (ProLink): ±2 Vmax@≤100mV/div, 5.5Vrms@>100mV/div 50 Ω (ProBus): ±5 Vmax, 3.5 Vrms 1 MΩ (ProBus): 250 V max. (peak AC: < 10 kHz + DC) |
| Channel-Channel Isolation | DC to 10 GHz: 50 dB (>315:1) 10 to 15 GHz: 46 dB (>200:1) 15 to 20 GHz: 40 dB (>100:1) 25 GHz to Max BW: 30 dB (>32:1) (For any two ProLink or 2.92mm input channels, same or different v/div settings, typical) |
| Vertical Resolution | 8 bits; up to 11 bits with enhanced resolution (ERES) |
| Sensitivity | 50 Ω (2.92 mm): 10 mV-500 mV/div, fully
variable 50 Ω (ProLink): 2 mV-1 V/div, fully variable (2-9.9 mV/div via zoom) 50 Ω (ProBus): 2 mV-1 V/div, fully variable 1 MΩ (ProBus): 2 mV-10 V/div, fully variable |
| DC Vertical Gain Accuracy (Gain Component of DC Accuracy) | ±1% F.S. (typical), offset at 0V; ±1.5% F.S. (test limit), offset at 0V |
| Offset Range | 50 Ω (2.92 mm): ±500 mV @ 2-79 mV/div ±4 V @ 80 mV/div -500 mV/div 50 Ω (ProLink): ±500 mV @ 2-100 mV/div ±4 V @ >100 mV/div -1 V/div 50 Ω (ProBus): ±750 mV @ 2-100 mV/div ±4 V @ >100 mV/div -1 V/div 1 MΩ: ±1V @ 2-128 mV/div ±10V @ 130mV-1.28V/div ±100V @ 1.3V-10V/div |
| DC Vertical Offset Accuracy | ±(1.5% of offset setting + 1 mV) (test limit) |
Horizontal System |
|
| Timebases | Internal timebase with 10 GHz clock frequency common to all input channels. Single, distributed 10 GHz clock for all channels ensures precise synchronization with timing accuracy between all channels identical to that provided within a single, conventional oscilloscope package. |
| Time/Division Range | For ≥25 GHz Mode: Real-Time Mode, 20 ps/div
- 640 μs/div, depending on memory length For ≤20 GHz Mode: 20 ps/div-64 s/div (Real-Time Mode: 20 ps/div - 64 s/div; RIS mode: 20 ps/div - 10 ns/div, user selectable at ≤10ns/div; Roll mode: Not available |
| Clock Accuracy | < 1 ppm + (aging of 0.5ppm/yr from last calibration) |
| Time Interval Accuracy | < 0.06 / SR + (clock accuracy* Reading) (rms) |
| Jitter Noise Floor | For Acq. Length ≤10μs: 140 fsrms (TIE,
typical) For Acq. Length >10μs: 190 fsrms (TIE, typical) |
| Trigger and Interpolator Jitter | <0.1 psrms (typical, software assisted), 2 psrms (typical, hardware), |
| Channel-Channel Deskew Range | ±9 x time/div. setting or 25 ns max. (whichever is larger), each channel |
| External Timebase Reference (Input) | 10 MHz; 50 Ω impedance, applied at the rear input |
| External Timebase Reference (Output) | 10 MHz; 50 Ω impedance, output at the rear |
| External Clock | Not Available |
Acquisition System |
|
| Single-Shot Sample Rate/Ch | 80 GS/s on each channel in >25 GHz
Mode. 40 GS/s on each channel in <20 GHz Mode. (80 GS/s in <20 GHz Mode when combining channels using the optional WM8Zi-2X80GS External Interleaving Device) |
| Random Interleaved Sampling (RIS) | For ≥25 GHz Mode: Not Applicable For <25 GHz Mode: 200 GS/s for repetitive signals (20 ps/div to 10 ns/div) |
| Maximum Trigger Rate | 1,000,000 waveforms/second (in Sequence Mode, up to 4 channels) |
| Intersegment Time | 1 μs |
| Memory Options (4 Ch / 2 Ch / 1Ch) | S-32 Option: 64M / 64M / 64M (3,500) M-64 Option: 128M / 128M / 128M (7,500) L-128 Option: 256M / 256M / 256M (15,000) VL-256 Option: 512M / 512M / 512M (15,000) (In <20 GHz Modes, reference memory specification for 20 GHz LabMaster) |
| Standard Memory (4 Ch / 2 Ch / 1Ch) (Number of Segments) | 40 M / 40 M / 40M (In <20 GHz Modes, reference memory specification for 20 GHz LabMaster) (1000) |
Acquisition Processing |
|
| Averaging | Summed averaging to 1 million sweeps; continuous averaging to 1 million sweeps |
| Enhanced Resolution (ERES) | From 8.5 to 11 bits vertical resolution |
| Envelope (Extrema) | Envelope, floor, or roof for up to 1 million sweeps |
| Interpolation | Linear or Sin x/x |
Triggering System |
|
| Modes | Normal, Auto, Single, and Stop |
| Sources | Using 9xxMZi-A Master Acquisition
Module: any input channel, Aux, Aux/10, Line, or Fast Edge on
9xxMZi-A, or any input channel (Edge trigger only) on 9xxSZi-A Slave
Acquisition Modules. Using 9CZi-A Master Control Module: Any Ch 1-4 or Fast Edge of the first 9xxSZi-A "Slave" Acquisition Module input, or any input channel (Edge trigger only) on additional 9xxSZi-A Slave Acquisition Modules. Slope and level unique to each source except line trigger. |
| Coupling Mode | DC, AC, HFRej, LFRej |
| Pre-trigger Delay | 0-100% of memory size (adjustable in 1% increments of 100 ns) |
| Post-trigger Delay | 0-10,000 divisions in real time mode, limited at slower time/div settings or in roll mode |
| Hold-off by Time | From 2 ns up to 20 s or from 1 to 99,999,999 events |
| Internal Trigger Range | ±4.1 div from center |
| Trigger Sensitivity with Edge Trigger (Ch 1-4) 2.4/2.92mm Inputs | 3 div @ < 15 GHz 1.5 div @ < 3 GHz 1.0 div @ < 200 MHz (for DC coupling, ≥ 10 mV/div, 50 Ω ) |
| Trigger Sensitivity with Edge Trigger (Ch 1–4) ProBus Inputs | 2 div @ < 3.5 GHz, 1.5 div @ < 1.75 GHz, 1.0 div @ < 200 MHz, (for DC coupling, ≥ 10 mV/div, 50 Ω ) |
| Trigger Sensitivity with Edge Trigger (Ch 1–4) ProLink Inputs | For 9xxMZi-A "Master" Acquisition
Module or Ch 1-4 of a 9xxSZi-A "Slave" Acquisition Module when used
with a 9CZi-A Master Control Module: 3 div @ < 15 GHz, 1.5 div @ < 3 GHz, 1.0 div @ < 200 MHz, (for DC, AC, LFRej coupling, ≥ 10 mV/div, 50 Ω ) |
| External Trigger Sensitivity, (Edge Trigger) | For 9xxMZi-A "Master" Acquisition
Module or Slave Acquisition Module used with 9CZi-A Master Control
Module: 2 div @ < 1 GHz, 1.5 div @ < 500 MHz, 1.0 div @ < 200 MHz, (for DC coupling) |
| External Trigger Input Range | For 9xxMZi-A "Master" Acquisition Module or Ch 1-4 of a 9xxSZi-A "Slave" Acquisition Module when used with a 9CZi-A Master Control Module: Aux (±0.4 V); Aux/10 (±4 V) |
| Max. Trigger Frequency, SMART Trigger | For 9xxMZi-A "Master" Acquisition
Module or Ch 1-4 of a 9xxSZi-A "Slave" Acquisition Module when used
with a 9CZi-A Master Control Module: 2.0 GHz @ ≥ 10 mV/div (minimum triggerable width 200 ps) |
Basic Triggers |
|
| Edge | Triggers when signal meets slope (positive, negative, or either) and level condition. |
| Window | Triggers when signal exits a window defined by adjustable thresholds |
| TV-Composite Video | Triggers NTSC or PAL with selectable line and field; HDTV (720p, 1080i, 1080p) with selectable frame rate (50 or 60 Hz) and Line; or CUSTOM with selectable Fields (1-8), Lines (up to 2000), Frame Rates (25, 30, 50, or 60 Hz), Interlacing (1:1, 2:1, 4:1, 8:1), or Synch Pulse Slope (Positive or Negative). |
SMART Triggers |
|
| State or Edge Qualified | Triggers on any input source only if a defined state or edge occurred on another input source. Holdoff between sources is selectable by time or events. |
| Qualified First | In Sequence acquisition mode, triggers repeatably on event B only if a defined pattern, state, or edge (event A) is satisfied in the first segment of the acquisition. Holdoff between sources is selectable by time or events. |
| Dropout | Triggers if signal drops out for longer than selected time between 1 ns and 20 s. |
| Pattern | Logic combination (AND, NAND, OR, NOR) of 5 inputs (4 channels and external trigger input). Each source can be high, low, or don't care. The High and Low level can be selected independently. Triggers at start or end of the pattern. |
SMART Triggers with Exclusion Technology |
|
| Glitch | Triggers on positive or negative glitches with widths selectable as low as 200ps to 20 s, or on intermittent faults. |
| Width (Signal or Pattern) | Triggers on positive, negative, or both widths with widths selectable as low as 200ps to 20 s, or on intermittent faults. |
| Interval (Signal or Pattern) | Triggers on intervals selectable between 1 ns and 20 s. |
| Timeout (State/Edge Qualified) | Triggers on any source if a given state
(or transition edge) has occurred on another source. Delay between sources is 1 ns to 20 s, or 1 to 99,999,999 events. |
| Runt | Trigger on positive or negative runts defined by two voltage limits and two time limits. Select between 1 ns and 20 ns. |
| Slew Rate | Trigger on edge rates. Select limits for dV, dt, and slope. Select edge limits between 1 ns and 20 ns. |
| Exclusion Triggering | Trigger on intermittent faults by specifying the expected behavior and triggering when that condition is not met |
Cascade (Sequence) Triggering |
|
| Capability | Arm on "A" event, then Trigger on "B" event. Or Arm on "A" event, then Qualify on "B" event, and Trigger on "C" event. Or Arm on "A" event, then Qualify on "B" then "C" event, and Trigger on "D" event |
| Types | A, B, C, or D event: Edge, Glitch, Width, Window, Dropout, Interval, Runt, Slew Rate, or Pattern (analog) |
| Holdoff | Holdoff between A and B, B and C, C or D, or any is selectable by time or number of events |
| Reset | Reset between A and B, B and C, C and D, or any combination is selectable in time or number of events |
High Speed Serial Protocol Triggering |
|
| Data Rates | (Option LM9Zi-HSPT, for signals connected to 9xxMZi-A "Master" Acquisition Module Channel 4 input) 100 Mb/s - 2.7 Gb/s, 3.0, 3.125 Gb/s |
| Pattern Length | 80 bits, NRZ or 8b10b |
| Clock and Data Outputs | 400mVp-p (typical) AC coupled |
| Clock Recovery Jitter | 2 psrms + 0.3% Unit Interval rms for PRBS data patterns with 50% transition density (typical) |
| Hardware Clock Recovery Loop BW | PLL Loop BW = Fbaud/5500, 100 Mb/s to 2.488 Gb/s (typical) |
Low Speed Serial Protocol Triggering (Optional) |
|
| Optionally available | I2C, SPI (SPI, SSPI, SIOP), UART-RS232, CAN, LIN, FlexRay, I2S (Audio), MIL-1553 |
Color Waveform Display |
|
| Type | On 9xxMZi-A "Master" Acquisition Module or 9CZi-A Master Control Module: Color 15.3" flat panel TFT-Active Matrix LCD with high resolution touch screen |
| Resolution | WXGA; 1280 x 768 pixels. |
| Number of traces | Display a maximum of 40 traces. Simultaneously display channel, zoom, memory and math traces. |
| Grid Styles | Auto, Single, Dual, Quad, Octal, X-Y, Single+X-Y, Dual+X-Y, Twelve, Sixteen, Twenty |
| Waveform Representation | Sample dots joined, or sample dots only |
Internal Waveform Memory |
|
| Internal Waveform Memory | 4 active waveform memory traces (M1-M4) store 16 bit/point full length waveforms. Waveforms can be stored to any number of files limited only by the data storage media capacity. |
LeCroy WaveStream™ Fast Viewing Mode |
|
| Intensity | 256 Intensity Levels, 1-100% adjustable via front panel control |
| Types | Select analog or color-graded |
| Number of Channels | up to 20 simultaneously |
| Max Sampling Rate | 80 GS/s |
| Persistence Aging | Select from 500 ms to Infinity |
| Waveforms/second (continuous) | up to 2500 Waveforms/second |
| Operation | Front panel toggle between WaveStream ON (Analog), ON (Color) and OFF |
Automatic Setup |
|
| Auto Setup | Automatically sets timebase, trigger, and sensitivity to display a wide range of repetitive signals |
| Find Vertical Scale | Automatically sets the vertical sensitivity and offset for the selected channel to display a waveform with the maximum dynamic range |
Probes |
|
| Probes | 9xxMZi-A Models: Acquisition Module:
Qty. (2) ÷10 Passive Probes 9xxSZi-A and 9CZi-A Models: No passive probes supplied |
| Probing System | 9xxMZi-A "Master" Acquisition Module:
Probus, ProLink, and 2.4/2.92mm. 9xxSZi-A "Slave" Acquisition Module: ProLink and 2.4/2.92mm. Automatically detects and supports a variety of compatible probes. |
| Scale Factors | Automatically or manually selected depending on probe used |
| Calibration Output | 9xxMZi-A "Master" Acquisition Module: 1kHz square wave, 1Vp-p (typical), output to probe hook |
Integrated Second Display |
|
| Type | Color 15.3" flat panel TFT-Active
Matrix LCD with high resolution touch screen. Requires ordering of option LM9Zi-VIDEOCARD-Zi-EXTDISP-15 to replace the standard video card in the LabMaster CPU or LabMaster 9CZi-A Master Control Module, so performance described in "External Monitor Port" is no longer provided. DVI and power connector provided to support LeCroy Zi-EXTDISP-15 additional touch screen display accessory. Includes support for extended desktop operation. |
| Resolution | WXGA; 1280 x 768 pixels |
Analog Persistence Display |
|
| Analog and Color-Graded Persistence | Variable saturation levels; stores each trace's persistence data in memory |
| Trace Selection | Activate persistence on all or any combination of traces |
| Sweep Display Modes | All accumulated, or all accumulated with last trace highlighted |
| Persistence Types | Select analog, color, or three-dimensional |
| Persistence Aging | Select from 500 ms to infinity |
High Speed Digitizer Output (Option) |
|
| Type | Option LSIB-1. Installs in LabMaster 9xxMZi-A CPU or LabMaster 9CZi-A Master Control Module and uses one available PCIe slot normally used by a 9xxSZi-A module. |
| Transfer Rate | up to 325 MB/s (typical) |
| Output Protocol | PCI Express, Gen 1 (4 lanes utilized for data transfer) |
| Control Protocol | TCP/IP |
| Command Set | Via Windows Automation, or via LeCroy Remote Command Set |
Processor/CPU |
|
| Type | In 9xxMZi-A CPU or 9CZi-A Master Control Module: Intel® XeonTM X5660 2.8 GHz (or better). There are two processors in each CPU, and each processor has 6 cores for a total of 12 cores and an effective processor speed of 33.6 GHz. |
| Processor Memory | 24 GB standard. Up to 192 GB optionally available. |
| Operating System | Microsoft Windows® 7 Professional Edition (64-bit) |
| Real Time Clock | Date and time displayed with waveform in hardcopy files. SNTP support to synchronize to precision internal clocks. |
Zoom Expansion Traces |
|
| Zoom Expansion Traces | Display up to 20 channels and up to 4 Memory, 8 Math, and 4 Zoom traces |
Setup Storage |
|
| Front Panel and Instrument Status | Store to the internal hard drive, over a network, or to a USB-connected peripheral device. |
Interface |
|
| Remote Control | Via Windows Automation, or via LeCroy Remote Command Set |
| Network Communication Standard | VXI-11 or VICP, LXI Class C (v1.2) Compliant |
| GPIB Port (optional) | Supports IEEE - 488.2. Installs in LabMaster 9xxMZi-A CPU or 9CZi-A Master Control Module and uses one available PCIe slot normally used by a 9xxSZi-A module. |
| LSIB Port (optional) | Supports PCIe Gen1 x4 protocol with LeCroy supplied API. Installs in LabMaster 9xxMZi-A CPU or 9CZi-A Master Control Module and uses one available PCIe slot normally used by a 9xxSZi-A module. |
| Ethernet Port | Supports 10/100/1000BaseT Ethernet interface (RJ45 port) |
| USB Ports | 9xxMZi-A CPU or 9CZi-A Master Control
Module: minimum 2 total USB 2.0 ports on reare of unit to support
Windows compatible devices 9xxMZi "Master" Acquisition Module or 9CZi-A Master Control Module: minimum 3 total USB 2.0 ports on front of unit to support Windows compatible devices. |
| External Monitor Port | In 9xxMZi-A CPU or 9CZi-A Master
Control Module: Dual Link DVI compatible to support internal display or internal display on 9xxMZi-A "Master" Acquisition Module (1280 x 768 pixel resolution) or customer-supplied monitor with up to WQXGA (2560 x 1600 pixel) resolution. 15 pin D-Type WXGA compatible to support customer-supplied external monitor. Only one monitor can operate at a time. |
| Serial Port | Not Available |
| Peripheral Bus | Not Available |
Auxiliary Input |
|
| Signal Types | For External Trigger Input. Located in 9xxMZi-A "Master" Acquisition Module or Slave Acquisition Module #1 (rear-mounted BNC, 50 Ω) used with 9CZi-A Master Control Module. |
| Coupling | 9xxMZi-A "Master" Acquisition Module:
50 Ω: DC; 1 MΩ: AC, DC, GND 9CZi-A Master Control Module: 50 Ω only |
| Max. Input Voltage | 5 Vrms (50 Ω); 250 V (Peak AC < 10 kHz + DC) (1 MΩ) |
Auxiliary Output |
|
| Connector Type | BNC, located on front of 9xxMZi-A "Master" Acquisition Module |
| Signal Types | 9xxMZi-A "Master" Acquisition Module:
Select from calibrator, control signals or Off (Not available with 9CZi-A Master Control Module) |
| Output Signal | 500 Hz-5 MHz square wave or DC level; 0.0 to 500 mV into 50 Ω (0-1 V into 1 MΩ) |
| Control Signals | Trigger enabled, trigger out, pass/fail status, off |
General |
|
| Auto Calibration | Ensures specified DC and timing accuracy is maintained for 1 year minimum. |
Power Requirements |
|
| Voltage | LabMaster 9xxMZi-A "Master" Acquisition
Module and 9xxSZi-A: 100-240 VAC ±10% at 45-66 Hz; 100-120 VAC ±10%
at 380-420 Hz; Automatic AC Voltage Selection, Installation Category
II LabMaster 9xxMZi-A CPU: 100-240 VAC ±10% at 45-66 Hz; Automatic AC Voltage Selection, Installation Category II LabMaster 9CZi-A Master Control Module: 100–240 VAC ±10% at 45-66 Hz; Automatic AC Voltage Selection, Installation Category II |
| Max. Power Consumption | 9xxMZi-A "Master" Acquisition Module -
900 W / 900 VA. 9xxMZi-A CPU - 400 W / 400 VA. 9xxSZi-A "Slave" Acquisition Module - 750 W / 750 VA. 9CZi-A Master Control Module - 450 W / 450 VA. Each Module has a separate power cord. |
Environmental and Safety |
|
| Temperature (Operating) | +5 °C to +40 °C |
| Temperature (Non-Operating) | -20 °C to +60 °C |
| Humidity (Operating) | 5% to 80% relative humidity
(non-condensing) up to +31 °C. Upper limit derates to 50% relative humidity (non-condensing) at +40 °C. |
| Humidity (Non-Operating) | 5% to 95% relative humidity (non-condensing) as tested per MIL-PRF-28800F |
| Altitude (Operating) | Up to 10,000 ft. (3048 m) at or below +25 °C |
| Altitude (Non-Operating) | Up to 40,000 ft. (12,192 m) |
| Random Vibration (Operating) | 0.5 grms 5 Hz to 500 Hz, 15 minutes in each of three orthogonal axes |
| Random Vibration (Non-Operating) | 2.4 grms 5 Hz to 500 Hz, 15 minutes in each of three orthogonal axes |
| Functional Shock | 20 g peak, half sine, 11 ms pulse, 3 shocks (positive and negative) in each of three orthogonal axes, 18 shocks total |
Physical Dimensions |
|
| Dimensions (HWD) | 9xxMZi-A "Master" Acquisition Module
and 9CZi-A Master Control Module - 14"H x 18.4"W x 16"D (355 x 467 x
406 mm). 9xxMZi-A CPU - 5.7"H x 18.2"W x 20.8"D (145mm x 462mm x 527mm). 9xxSZi-A "Slave" Acquisition Module - 7"H x 18.2"W x 20.8"D (177mm x 462mm x 527mm). |
| Weight | 930MZi-A "Master" Acquisition Module -
55 lbs. (25 kg) 9xxMZi-A CPU - 29 lbs. (13 kg) 93xSZi-A "Slave" Acquisition Module - 44 lbs. (20 kg) 9CZi-A Master Control Module - 41 lbs. (19 kg) |
| Shipping Weight | 930MZi-A "Master" Acquisition Module -
77 lbs. (35 kg) 9xxMZi-A CPU - 29 lbs. (13 kg) 93xSZi-A "Slave" Acquisition Module - 51 lbs. (23 kg) 9CZi-A Master Control Module - 41 lbs. (19 kg) |
Certifications |
|
| Certifications | CE Compliant, UL and cUL listed; conforms to EN 61326, EN 61010-1, UL 61010-1 2nd edition, and CSA C22.2 No. 61010-1-04 |
Warranty and Service |
|
| Warranty and Service | 3-year warranty; calibration
recommended annually. Optional service programs include extended warranty, upgrades, and calibration services. |
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