* 販売終了しました。

デジタル･オシロスコープ
WaveRunner 6Ziシリーズ

WaveRunner6Ziシリーズは、アナログ帯域400MHzから4GHzまでをカバーするオシロスコープで、 様々な機能を盛込むことができます。解析力を伴った真のロングメモリ、 40GS/sのサンプリング速度、低雑音、そして俊敏な動きはお客様の仕事の効率を更に高めるものになります。

12ビットのWaveRunner HRO 6Ziシリーズはこちら

  • 　
  • 　
  • 　

基本仕様
モデル名 帯域 サンプリング速度
(4ch時/2ch時)		 標準メモリ
(4ch時/2ch時)		 垂直
分解能
WaveRunner 604Zi
販売終了		 400MHz 10/20 GS/s 16/32 Mポイント
（WaveRunner620MZiは
64/128 Mポイント）		 8ビット
WaveRunner 606Zi
販売終了 		600MHz 10/20 GS/s
WaveRunner 610Zi
販売終了 		1GHz 10/20 GS/s
WaveRunner 620Zi
販売終了 		2GHz 10/20 GS/s
WaveRunner 620MZi
販売終了		 2GHz 20/40 GS/s
WaveRunner 625Zi
販売終了		 2.5GHz 20/40 GS/s
WaveRunner 640Zi
販売終了		 4GHz 20/40 GS/s

12ビットのWaveRunner HRO 6Ziシリーズはこちら

モデルごとスペック詳細（モデル名をクリックで詳細表示されます） 

WaveRunner604Zi　スペック

Vertical System
Nominal Analog Bandwidth @ Ω 50 10 mV-1 V/div 400 MHz
(≧2 mV/div)
Rise Time (20–80%) 650 ps (typical)
Rise Time (10–90%) 875 ps (typical)
Input Channels 4
Bandwidth Limiters 20MHz,200MHz
Input Impedance 50 Ω±2% or 1 MΩ||17pF, 10 MΩ || 9.5 pF with supplied Probe
Maximum Input Voltage 50 Ω: 5V RMS ± 10V peak
1 MΩ: 400 V max. (DC + peak AC ＜ 10 kHz)
Channel-Channel Isolation ＞ 100:1 up to rated BW
Vertical Resolution 8 bits; up to 11 bits with enhanced resolution (ERES)
Sensitivity 50 Ω:1 mV/div - 1 V/div, fully variable
1 MΩ: 1 mV/div - 10 V/div, fully variable
DC Vertical Gain Accuracy (Gain Component of DC Accuracy) ±1% F.S. (typical), offset at 0V; ±1.5% F.S. (test limit), offset at 0V
Offset Range 50 Ω:
±1.6 V @ 2 mV - 4.95 mV
±4 V @ 5mV - 9.9 mV
±8 V @ 10mV - 19.8 mV
±10 V @ 20mV - 1V
1 MΩ:
±1.6 V @ 2 mV - 4.95 mV
±4 V @ 5mV - 9.9 mV
±8 V @ 10mV - 19.8 mV
±16 V @ 20mV - 140 mV
±80 V @ 142mV - 1.4 V
±160 V @ 1.42mV - 10V
DC Vertical Offset Accuracy ±(1.5% of offset setting +1% of full scale + 1 mV) (test limit)
　

Horizontal System
Clock Accuracy ≦1.5 ppm +(aging of 0.5 ppm/yr from last calibration)
Trigger and Interpolator Jitter ≦ 4 psrms (typical)
＜0.1 psrms (typical, software assisted)
　

Acquisition System
Single-Shot Sample Rate/Ch 10 GS/s on 4Ch
20 GS/s on 2 Ch
Memory Options (4 Ch / 2 Ch / 1Ch) S-32 Option:
32M / 64M / 64M
(15,000)
M-64 Option:
64M / 128M / 128M
(15,000)
Standard Memory (4 Ch / 2 Ch / 1Ch) (Number of Segments) 16 M / 32 M / 32M
(4,500)
　

Acquisition Processing
Enhanced Resolution (ERES) From 8.5 to 11 bits vertical resolution
　

Triggering System
Trigger Sensitivity with Edge Trigger (Ch 1–4) ProBus Inputs 2 div @ ＜ 400 MHz
1.5 div @ ＜ 200 MHz
0.9 div @ ＜10 MHz
(DC, AC, and LFRej coupling, ≧ 10 mV/div, 50 Ω)
Max. Trigger Frequency, SMART Trigger 400 MHz @ ≧ 10 mV/div
(minimum triggerable width 1.9 ns)
　

High Speed Serial Protocol Triggering
Data Rates 320 Mb/s - 3 Gb/s
Pattern Length 80 bits, NRZ or 8b10b
Clock Recovery Jitter 1 ps rms + 0.3% Unit Interval rms for PRBS data patterns with 50% transition density
Hardware Clock Recovery Loop BW PLL Loop BW = Fbaud/5500, 100 Mb/s to 2.488 Gb/s (typical)
　

LeCroy WaveStream™ Fast Viewing Mode
Max Sampling Rate 10 GS/s (20 GS/s when interleaved)
　
WaveRunner606Zi　スペック

Vertical System
Nominal Analog Bandwidth @ Ω 50 10 mV-1 V/div 600 MHz
(≧2 mV/div)
Rise Time (20–80%) 435 ps (typical)
Rise Time (10–90%) 580 ps (typical)
Input Channels 4
Bandwidth Limiters 20MHz, 200MHz
Input Impedance 50 Ω±2% or 1 MΩ||17pF, 10 MΩ || 9.5 pF with supplied Probe
Maximum Input Voltage 50 Ω: 5V RMS ± 10V peak
1 MΩ: 400 V max. (DC + peak AC ＜ 10 kHz)
Channel-Channel Isolation ＞ 100:1 up to rated BW
Vertical Resolution 8 bits; up to 11 bits with enhanced resolution (ERES)
Sensitivity 50 Ω:1 mV/div - 1 V/div, fully variable
1 MΩ: 1 mV/div - 10 V/div, fully variable
DC Vertical Gain Accuracy (Gain Component of DC Accuracy) ±1% F.S. (typical), offset at 0V; ±1.5% F.S. (test limit), offset at 0V
Offset Range 50 Ω:
±1.6 V @ 2 mV - 4.95 mV
±4 V @ 5mV - 9.9 mV
±8 V @ 10mV - 19.8 mV
±10 V @ 20mV - 1V
1 MΩ:
±1.6 V @ 2 mV - 4.95 mV
±4 V @ 5mV - 9.9 mV
±8 V @ 10mV - 19.8 mV
±16 V @ 20mV - 140 mV
±80 V @ 142mV - 1.4 V
±160 V @ 1.42mV - 10V
DC Vertical Offset Accuracy ±(1.5% of offset setting +1% of full scale + 1 mV) (test limit)
　

Horizontal System
Clock Accuracy ≦1.5 ppm +(aging of 0.5 ppm/yr from last calibration)
Trigger and Interpolator Jitter ≦ 4.5 psrms (typical)
＜0.1 psrms (typical, software assisted)
External Clock DC to 100 MHz; (50 Ω/1 MΩ), EXT BNC input, Minimum rise time and amplitude requirements apply at low frequencies.
　

Acquisition System
Single-Shot Sample Rate/Ch 10 GS/s on 4Ch
20 GS/s on 2 Ch
Memory Options (4 Ch / 2 Ch / 1Ch) S-32 Option:
32M / 64M / 64M
(15,000)
M-64 Option:
64M / 128M / 128M
(15,000)
Standard Memory (4 Ch / 2 Ch / 1Ch) (Number of Segments) 16 M / 32 M / 32M
(4,500)
　

Acquisition Processing
Enhanced Resolution (ERES) From 8.5 to 11 bits vertical resolution
　

Triggering System
Trigger Sensitivity with Edge Trigger (Ch 1–4) ProBus Inputs 2 div @ ＜ 600 MHz
1.5 div @＜ 300 MHz
1 div @ ＜ 200 MHz
0.9 div @＜10 MHz
(DC, AC, and LFRej coupling, ≧ 10 mV/div, 50 Ω)
Max. Trigger Frequency, SMART Trigger 600 MHz @ ≧ 10 mV/div
(minimum triggerable width 1.2 ns)
　

High Speed Serial Protocol Triggering
Data Rates 320 Mb/s - 3 Gb/s
Pattern Length 80 bits, NRZ or 8b10b
Clock Recovery Jitter 1 ps rms + 0.3% Unit Interval rms for PRBS data patterns with 50% transition density
Hardware Clock Recovery Loop BW PLL Loop BW = Fbaud/5500, 100 Mb/s to 2.488 Gb/s (typical)
　

LeCroy WaveStream™ Fast Viewing Mode
Max Sampling Rate 10 GS/s (20 GS/s when interleaved)
　

Auxiliary Input
Max. Input Voltage 50 Ω: 5 Vrms; 1 MΩ: 250 Vmax (DC + Peak AC ≦ 10 kHz)
　
WaveRunner610Zi　スペック

Vertical System
Nominal Analog Bandwidth @ Ω 50 10 mV-1 V/div 1 GHz
(≧2 mV/div)
Rise Time (20–80%) 280 ps (typical)
Rise Time (10–90%) 375 ps (typical)
Input Channels 4
Bandwidth Limiters 20MHz, 200MHz
Input Impedance 50 Ω±2% or 1 MΩ||17pF, 10 MΩ || 9.5 pF with supplied Probe
Maximum Input Voltage 50 Ω: 5V RMS ± 10V peak
1 MΩ: 400 V max. (DC + peak AC ＜ 10 kHz)
Channel-Channel Isolation ＞ 100:1 up to rated BW
Vertical Resolution 8 bits; up to 11 bits with enhanced resolution (ERES)
Sensitivity 50 Ω:1 mV/div - 1 V/div, fully variable
1 MΩ: 1 mV/div - 10 V/div, fully variable
DC Vertical Gain Accuracy (Gain Component of DC Accuracy) ±1% F.S. (typical), offset at 0V; ±1.5% F.S. (test limit), offset at 0V
Offset Range 50 Ω:
±1.6 V @ 2 mV - 4.95 mV
±4 V @ 5mV - 9.9 mV
±8 V @ 10mV - 19.8 mV
±10 V @ 20mV - 1V
1 MΩ:
±1.6 V @ 2 mV - 4.95 mV
±4 V @ 5mV - 9.9 mV
±8 V @ 10mV - 19.8 mV
±16 V @ 20mV - 140 mV
±80 V @ 142mV - 1.4 V
±160 V @ 1.42mV - 10V
DC Vertical Offset Accuracy ±(1.5% of offset setting +1% of full scale + 1 mV) (test limit)
　

Horizontal System
Clock Accuracy ≦1.5 ppm +(aging of 0.5 ppm/yr from last calibration)
Trigger and Interpolator Jitter ≦ 3.5 psrms (typical)
＜0.1 psrms (typical, software assisted)
External Clock DC to 100 MHz; (50 Ω/1 MΩ), EXT BNC input, Minimum rise time and amplitude requirements apply at low frequencies.
　

Acquisition System
Single-Shot Sample Rate/Ch 10 GS/s on 4Ch
20 GS/s on 2 Ch
Memory Options (4 Ch / 2 Ch / 1Ch) S-32 Option:
32M / 64M / 64M
(15,000)
M-64 Option:
64M / 128M / 128M
(15,000)
Standard Memory (4 Ch / 2 Ch / 1Ch) (Number of Segments) 16 M / 32 M / 32M
(4,500)
　

Acquisition Processing
Enhanced Resolution (ERES) From 8.5 to 11 bits vertical resolution
　

Triggering System
Trigger Sensitivity with Edge Trigger (Ch 1–4) ProBus Inputs 2 div @ ＜ 1 GHz
1.5 div @＜ 500 MHz
1 div @ ＜ 200 MHz
0.9 div @＜10 MHz
(DC, AC, and LFRej coupling, ≧ 10 mV/div, 50 Ω)
External Trigger Sensitivity, (Edge Trigger) 2 div @ 1 GHz
1.5 div @ ＜ 500 MHz
1 div @ ＜200 MHz
0.9 div @＜10 MHz
(DC, AC, and LFRej coupling)
Max. Trigger Frequency, SMART Trigger 1.0 GHz @ ≧ 10 mV/div
(minimum triggerable width 750 ps)
　

High Speed Serial Protocol Triggering
Data Rates 320 Mb/s - 3 Gb/s
Pattern Length 80 bits, NRZ or 8b10b
Clock Recovery Jitter 1 ps rms + 0.3% Unit Interval rms for PRBS data patterns with 50% transition density
Hardware Clock Recovery Loop BW PLL Loop BW = Fbaud/5500, 100 Mb/s to 2.488 Gb/s (typical)
　

LeCroy WaveStream™ Fast Viewing Mode
Max Sampling Rate 10 GS/s (20 GS/s when interleaved)
　

Auxiliary Input
Max. Input Voltage 50 Ω: 5 Vrms; 1 MΩ: 250 Vmax (DC + Peak AC ≦ 10 kHz)
　
WaveRunner620Zi　スペック

Vertical System
Nominal Analog Bandwidth @ Ω 50 10 mV-1 V/div 2 GHz
(≧ 5 mV/div)
Rise Time (20–80%) 140 ps (typical)
Rise Time (10–90%) 175 ps (typical)
Input Channels 4
Bandwidth Limiters 20MHz, 200MHz, 1GHz
Input Impedance 50 Ω±2% or 1 MΩ||17pF, 10 MΩ || 9.5 pF with supplied Probe
Maximum Input Voltage 50 Ω: 5V RMS ± 10V peak
1 MΩ: 400 V max. (DC + peak AC ＜ 10 kHz)
Channel-Channel Isolation ＞ 100:1 up to rated BW
Vertical Resolution 8 bits; up to 11 bits with enhanced resolution (ERES)
Sensitivity 50 Ω:1 mV/div - 1 V/div, fully variable
1 MΩ: 1 mV/div - 10 V/div, fully variable
DC Vertical Gain Accuracy (Gain Component of DC Accuracy) ±1% F.S. (typical), offset at 0V; ±1.5% F.S. (test limit), offset at 0V
Offset Range 50 Ω:
BWL≦1 GHz
±1.6 V @ 2 mV - 4.95 mV
±4 V @ 5mV - 9.9 mV
±8 V @ 10mV - 19.8 mV
±10 V @ 20mV - 1V
BWL＞1GHz
±1.4V @ 5 mV-122mV/div
±10V @ 124 mV-1V/div
1 MΩ:
±1.6 V @ 2 mV - 4.95 mV
±4 V @ 5mV - 9.9 mV
±8 V @ 10mV - 19.8 mV
±16 V @ 20mV - 140 mV
±80 V @ 142mV - 1.4 V
±160 V @ 1.42mV - 10V
DC Vertical Offset Accuracy ±(1.5% of offset setting +1% of full scale + 1 mV) (test limit)
　

Horizontal System
Clock Accuracy ≦1.5 ppm +(aging of 0.5 ppm/yr from last calibration)
Trigger and Interpolator Jitter ≦ 3 psrmsS (typical)
＜0.1 psrms (typical, software assisted)
External Clock DC to 100 MHz; (50 Ω/1 MΩ), EXT BNC input, Minimum rise time and amplitude requirements apply at low frequencies.
　

Acquisition System
Single-Shot Sample Rate/Ch 10 GS/s on 4Ch
20 GS/s on 2 Ch
Memory Options (4 Ch / 2 Ch / 1Ch) S-32 Option:
32M / 64M / 64M
(15,000)
M-64 Option:
64M / 128M / 128M
(15,000)
Standard Memory (4 Ch / 2 Ch / 1Ch) (Number of Segments) 16 M / 32 M / 32M
(4,500)
　

Acquisition Processing
Enhanced Resolution (ERES) From 8.5 to 11 bits vertical resolution
　

Triggering System
Trigger Sensitivity with Edge Trigger (Ch 1–4) ProBus Inputs 2 div @ ＜ 2 GHz
1.5 div @＜ 1 GHz
1 div @ ＜ 200 MHz
0.9 div @＜10 MHz
(DC, AC, and LFRej coupling, ≧ 10 mV/div, 50 Ω)
External Trigger Sensitivity, (Edge Trigger) 2 div @ 1 GHz
1.5 div @ ＜ 500 MHz
1 div @ ＜200 MHz
0.9 div @＜10 MHz
(DC, AC, and LFRej coupling)
Max. Trigger Frequency, SMART Trigger 2.0 GHz @ ≧ 10 mV/div
(minimum triggerable width 400 ps)
　

High Speed Serial Protocol Triggering
Data Rates 320 Mb/s - 3 Gb/s
Pattern Length 80 bits, NRZ or 8b10b
Clock Recovery Jitter 1 ps rms + 0.3% Unit Interval rms for PRBS data patterns with 50% transition density
Hardware Clock Recovery Loop BW PLL Loop BW = Fbaud/5500, 100 Mb/s to 2.488 Gb/s (typical)
　

LeCroy WaveStream™ Fast Viewing Mode
Max Sampling Rate 10 GS/s (20 GS/s when interleaved)
　

Auxiliary Input
Max. Input Voltage 50 Ω: 5 Vrms; 1 MΩ: 250 Vmax (DC + Peak AC ≦ 10 kHz)
　
WaveRunner620MZi　スペック

Vertical System
Bandwidth 2 GHz
Analog Bandwidth (Max) 2 GHz
Analog Bandwidth @ 50 Ω (-3 dB) (ProBus Input) 2 GHz
(≧ 5 mV/div)
Analog Bandwidth @ 1 MΩ (-3 dB) (ProBus Input) 500 MHz (typical)
Rise Time (10-90%, 50 Ω) 175 ps (typical)
Rise Time (20-80%, 50 Ω) 130 ps (typical)
Input Channels 4
Bandwidth Limiters 20MHz, 200MHz, 1GHz
Input Impedance 50 Ω+/-2% or 1 MΩ||17pF, 10 MΩ || 9.5 pF with supplied Probe
Input Coupling 1 MΩ: AC, DC, GND; 50 Ω: DC, GND
Maximum Input Voltage 50 Ω: 5V RMS ± 10V peak
1 MΩ: 400 V max. (DC + peak AC ＜ 10 kHz)
Channel-Channel Isolation ＞ 100:1 up to rated BW
Vertical Resolution 8 bits; up to 11 bits with enhanced resolution (ERES)
Sensitivity 50 Ω: 1 mV-1 V/div, fully variable;
1 MΩ: 1 mV-10 V/div, fully variable
DC Vertical Gain Accuracy (Gain Component of DC Accuracy) ±(0.5%) F.S, offset at 0 V
Offset Range 50 Ω
±1.6 V @ 2 mV - 4.95 mV/div
±4 V @ 5 mV - 9.9 mV/div
±8 V @ 10 mV - 19.8 mV/div
±10 V @ 20 mV - 1 V/div

1 MΩ
±1.6 V @ 2 mV - 4.95 mV/div
±4 V @ 5 mV - 9.9 mV/div
±8 V @ 10 mV - 19.8 mV/div
±16 V @ 20 mV - 140 mV/div
±80 V @ 142 mV - 1.4 V/div
±160 V @ 1.42 V - 10 V/div
DC Vertical Offset Accuracy ±(1.5% of offset setting +1% of full scale + 1 mV) (test limit)
 

Horizontal System
Timebases Internal timebase common to 4 input channels; an external clock may be applied at the auxiliary input
Time/Division Range 20 ps/div - 6.4 ks/div with standard memory
RIS available at ≦ 10 ns/div;
Roll Mode available at ≧ 100 ms/div and ≦ 5 MS/s
Clock Accuracy ＜=1.5 ppm +(aging of 0.5 ppm/yr from last calibration)
Trigger and Interpolator Jitter ≦ 3 ps RMS (typical)
＜0.1 ps RMS (typical, software assisted)
Channel-Channel Deskew Range ±9 x time/div. setting, 100 ms max., each channel
External Timebase Reference (Input) 10MHz +/-25ppm into 50 ohms (requires Lbus BNC adaptor)
External Timebase Reference (Output) 10MHz, 3.5 dBm +/-1dBm, syncronized to reference being used (internal or external reference)
via LBUS BNC adaptor
External Clock DC to 100 MHz; (50 Ω/1 MΩ), EXT BNC input, Minimum rise time and amplitude requirements apply at low frequencies.
 

Acquisition System
Sample Rate 20 GS/s on 2 Ch
40 GS/s on 4 Ch
Single-Shot Sample Rate/Ch 20 GS/s on 2 Ch
40 GS/s on 4 Ch
Random Interleaved Sampling (RIS) 200 GS/s for repetitive signals (20 ps/div to 10 ns/div)
Maximum Trigger Rate 1,000,000 waveforms/second (in Sequence Mode, up to 4 channels)
Intersegment Time 1 μs
Maximum Acquisition Memory 128 Mpts (2 Ch operation)
Standard Memory (4 Ch / 2 Ch / 1Ch) (Number of Segments) 64M / 128M / 128M
(15,000)
Memory Options (4 Ch / 2 Ch / 1Ch)
(Number of Segments)		 n/a
 

Acquisition Processing
Averaging Summed averaging to 1 million sweeps; continuous averaging to 1 million sweeps
Enhanced Resolution (ERES) From 8.5 to 11 bits vertical resolution
Envelope (Extrema) Envelope, floor, or roof for up to 1 million sweeps
Interpolation Linear or Sin x/x
 

Triggering System
Modes Normal, Auto, Single, and Stop
Sources Any input channel, Ext, Ext/10, or line; slope and level unique to each source (except line trigger)
Coupling Mode DC, AC, HFRej, LFRej
Pre-trigger Delay 0-100% of memory size (adjustable in 1% increments of 100 ns)
Post-trigger Delay 0-10,000 Divisions in real time mode, limited at slower time/div settings or in roll mode
Hold-off by Time or Events From 2 ns up to 20 s or from 1 to 99,999,999 events
Internal Trigger Range ±4.1 div from center (typical)
Trigger Sensitivity with Edge Trigger ProBus Inputs 2 div @ ＜ 2 GHz
1.5 div @＜ 1 GHz
1 div @ ＜ 200 MHz
0.9 div @＜10 MHz
(DC, AC, and LFRej coupling, ≧ 10 mV/div, 50 Ω)
External Trigger Sensitivity, (Edge Trigger) 2 div @ 1 GHz
1.5 div @ ＜ 500 MHz
1 div @ ＜200 MHz
0.9 div @＜10 MHz
(DC, AC, and LFRej coupling)
Max. Trigger Frequency, SMART Trigger 2.0 GHz @ ≧ 10 mV/div
(minimum triggerable width 400 ps)
External Trigger Input Range Ext (±0.4 V); Ext/10 (±4 V)
 

Basic Triggers
Edge Triggers when signal meets slope (positive, negative, or either) and level condition.
Window Triggers when signal exits a window defined by adjustable thresholds
TV-Composite Video Triggers NTSC or PAL with selectable line and field; HDTV (720p, 1080i, 1080p) with selectable frame rate (50 or 60 Hz) and Line; or CUSTOM with selectable Fields (1-8), Lines (up to 2000), Frame Rates (25, 30, 50, or 60 Hz), Interlacing (1:1, 2:1, 4:1, 8:1), or Synch Pulse Slope (Positive or Negative).
 

SMART Triggers
State or Edge Qualified Triggers on any input source only if a defined state or edge occurred on another input source. Delay between sources is selectable by time or events.
Qualified First In Sequence acquisition mode, triggers repeatably on event B only if a defined pattern, state, or edge (event A) is satisfied in the first segment of the acquisition. Holdoff between sources is selectable by time or events.
Dropout Triggers if signal drops out for longer than selected time between 1 ns and 20 s.
Pattern Logic combination (AND, NAND, OR, NOR) of 5 inputs (4 channels and external trigger input). Each source can be high, low, or don?t care. The High and Low level can be selected independently. Triggers at start or end of the pattern.
 

SMART Triggers with Exclusion Technology
Glitch Triggers on positive or negative glitches with selectable widths. minimum width 1.5ns, Maximum Width: 20s
Width (Signal or Pattern) Triggers on positive or negative glitches with selectable widths.
minimum width 1.5ns, Maximum Width: 20s
Interval (Signal or Pattern) Triggers on intervals selectable between 1 ns and 20 s.
Timeout (State/Edge Qualified) Triggers on any source if a given state (or transition edge) has occurred on another source.
Delay between sources is 1 ns to 20 s, or 1 to 99,999,999 events.
Runt Trigger on positive or negative runts defined by two voltage limits and two time limits. Select between 1 ns and 20 ns.
Slew Rate Trigger on edge rates. Select limits for dV, dt, and slope. Select edge limits between 1 ns and 20 ns.
Exclusion Triggering Trigger on intermittent faults by specifying the expected behavior and triggering when that condition is not met
 

Cascade (Sequence) Triggering
Capability Arm on "A" event, then Trigger on "B" event. Or Arm on "A" event, then Qualify on "B" event, and Trigger on "C" event.
Types Cascade A then B: Edge, Window, Pattern (Logic) Width, Glitch, Interval, Dropout, or Measurement. Measurement can be on Stage B only.
Cascade A then B then C (Measurement): Edge, Window, Pattern (Logic), Width, Glitch, Interval, Dropout, or Measurement. Measurement can be on Stage C only.
Cascade A then B then C: Edge, Window, Pattern (Logic)
Holdoff Holdoff between A and B or B and C is selectable by time (1ns to 20s) or number of events.
Measurement trigger selection as the last stage in a Cascade precludes a holdoff setting between the prior stage and the last stage.
 

High Speed Serial Protocol Triggering
Data Rates (Option WR6Zi-80B-8B10B TD)
150 Mb/s - 3 Gb/s
Pattern Length 80 bits, NRZ or 8b10b
Clock Recovery Jitter 1 ps rms + 0.3% Unit Interval rms for PRBS data patterns with 50% transition density
Hardware Clock Recovery Loop BW PLL Loop BW = Fbaud/5500, 100 Mb/s to 2.488 Gb/s (typical)
 

Low Speed Serial Protocol Triggering (Optional)
Optionally available CAN, LIN, FlexRay, MIL-STD-1553, USB 1.x/2.0, AudioBus, SATA
 

Measurement Trigger
Measurement Trigger Capability Select from a large number of measurement parameters trigger on a measurement value with qualified limits. Can be used as only trigger or last event in a Cascade Trigger.
 

Color Waveform Display
Type Color 12.1" widescreen flat panel TFT-Active Matrix with high resolution touch screen
Resolution WXGA; 1280 x 800 pixels.
Number of traces Display a maximum of 16 traces. Simultaneously display channel, zoom, memory and math traces.
Grid Styles Auto, Single, Dual, Quad, Octal, X-Y, Single+X-Y, Dual+X-Y
Waveform Representation Sample dots joined, or sample dots only
 

Internal Waveform Memory
Internal Waveform Memory 4 active waveform memory traces (M1-M4) store 16 bit/point full length waveforms. Waveforms can be stored to any number of files limited only by the data storage media capacity.
 

Integrated Second Display
Type Supports touch screen integration of user-supplied second display with split-grid capability.
Resolution (Note: touch screen driver for second display may not be a Fujitsu driver)
 

LeCroy WaveStream? Fast Viewing Mode
Intensity 256 Intensity Levels, 1-100% adjustable via front panel control
Types Select analog or color-graded
Number of Channels up to 4 simultaneously
Max Sampling Rate 10 GS/s (20 GS/s when interleaved)
Persistence Aging Select from 500 ms to Infinity
Waveforms/second (continuous) up to 2500 Waveforms/second
Operation Front panel toggle between WaveStream ON (Analog), ON (Color) and OFF
 

Analog Persistence Display
Analog and Color-Graded Persistence Variable saturation levels; stores each trace?s persistence data in memory
Persistence Types Select analog, color, or three-dimensional
Trace Selection Activate persistence on all or any combination of traces
Persistence Aging Select from 500 ms to infinity
Sweep Display Modes All accumulated, or all accumulated with last trace highlighted
 

Processor/CPU
Type Intel Core i5, 2.5 GHz (or better)
Processor Memory 2 GB standard, up to 4GB optional
Operating System Microsoft WindowsR 7 Pro 64 bit Embedded
Real Time Clock Date and time displayed with waveform in hardcopy files. SNTP support to synchronize to precision internal clocks.
 

Zoom Expansion Traces
Zoom Expansion Traces Display up to 8 Zoom and 8 Math/Zoom traces
 

Setup Storage
Front Panel and Instrument Status Store to the internal hard drive, over the network, or to a USB-connected peripheral device.
 

Interface
Remote Control Via Windows Automation, or via LeCroy Remote Command Set
Network Communication Standard VXI-11 or VICP, LXI Class C (v1.2) Compliant
GPIB Port Supports IEEE - 488.2 (External)
Ethernet Port Supports 2 10/100/1000BaseT Ethernet interface (RJ45 ports)
USB Ports Minimum 6 total (incl. 2 front panel) USB 2.0 ports support Windows compatible devices
USB Device Port 1 USBTMC port
External Monitor Port 15 pin D-Type WXGA compatible DB-15 to support customer-supplied external monitor.
Includes support for extended desktop operation with WXGA resolution on second monitor.
Peripheral Bus LeCroy LBUS standard
 

Auxiliary Input
Signal Types Select External Trigger or External Clock Input on the front panel
Coupling 50 Ω: DC; 1 MΩ: AC, DC, GND
Max. Input Voltage 50 Ω: 5 Vrms; 1 MΩ: 250 Vmax (DC + Peak AC ≦ 10 kHz)
 

Auxiliary Output
Signal Types Select from control signals or Off
Output Signal 500 Hz-1 MHz square wave or DC level; 50 mV-1 V into 1 MΩ
Control Signals Trigger enabled, trigger out, pass/fail status, off
Connector Type BNC, located on rear panel
 

Automatic Setup
Auto Setup Automatically sets timebase, trigger, and sensitivity to display a wide range of repetitive signals
Find Vertical Scale Automatically sets the vertical sensitivity and offset for the selected channel to display a waveform with the maximum dynamic range
 

General
Auto Calibration Ensures specified DC and timing accuracy is maintained for 1 year minimum.
 

Probes
Probes Qty. (4) ÷10 Passive Probes
Probe System Probus. Automatically detects and supports a variety of compatible probes
Scale Factors Automatically or manually selected depending on probe used
Calibration Output Default is 1kHz square wave, 1Vp-p (typical), output to probe hook. Settable from 250 Hz to 1 MHz square wave; 50 mV to 1.0V.
 

Power Requirements
Voltage 100-240 VAC ±10% at 45-66 Hz; 110-120 VAC ±10% at 380-420 Hz; Automatic AC Voltage Selection; Installation Category 300 V CAT II
Max. Power Consumption 500 VA
 

Environmental and Safety

Temperature (Operating) +5 °C to +40 °C
Temperature (Non-Operating) -20 °C to +60 °C
Humidity (Operating) 5% to 80% relative humidity (non-condensing) up to +31 °C.
Upper limit derates to 50% relative humidity (non-condensing) at +40 °C.
Humidity (Non-Operating) 5% to 95% relative humidity (non-condensing) as tested per MIL-PRF-28800F
Altitude (Operating) Up to 10,000 ft. (3048 m) at or below +25 °C
Altitude (Non-Operating) Up to 40,000 ft. (12,192 m)
Random Vibration (Operating) 0.31 grms 5 Hz to 500 Hz, 15 minutes in each of three orthogonal axes
Random Vibration (Non-Operating) 2.4 grms 5 Hz to 500 Hz, 15 minutes in each of three orthogonal axes
Functional Shock 30 g peak, half sine, 11 ms pulse, 3 shocks (positive and negative) in each of three orthogonal axes, 18 shocks total
 

Physical Dimensions
Dimensions (HWD) 11.69"H x 16.46"W x 8.94"D (297 x 418 x 227 mm)
Weight 25.4 lbs. (11.5 kg)
Shipping Weight 39 lbs. (17.7 kg)
 

Warranty and Service
Warranty and Service 3-year warranty; calibration recommended annually.
Optional service programs include extended warranty, upgrades, and calibration services.
 
WaveRunner625Zi　スペック

Vertical System
Nominal Analog Bandwidth @ Ω 50 10 mV-1 V/div 2.5 GHz
(≧ 5 mV/div)
Rise Time (10–90%) 160 ps (typical)
Rise Time (20–80%) 120 ps (typical)
Input Channels 4
Bandwidth Limiters 20MHz, 200MHz, 1GHz
Input Impedance 50 Ω±2% or 1 MΩ||17pF, 10 MΩ || 9.5 pF with supplied Probe
Maximum Input Voltage 50 Ω: 5V RMS ± 10V peak
1 MΩ: 400 V max. (DC + peak AC ＜ 10 kHz)
Channel-Channel Isolation ＞ 100:1 up to rated BW
Vertical Resolution 8 bits; up to 11 bits with enhanced resolution (ERES)
Sensitivity 50 Ω:1 mV/div - 1 V/div, fully variable
1 MΩ: 1 mV/div - 10 V/div, fully variable
DC Vertical Gain Accuracy (Gain Component of DC Accuracy) ±1% F.S. (typical), offset at 0V; ±1.5% F.S. (test limit), offset at 0V
Offset Range 50 Ω:
BWL≦1 GHz
±1.6 V @ 2 mV - 4.95 mV
±4 V @ 5mV - 9.9 mV
±8 V @ 10mV - 19.8 mV
±10 V @ 20mV - 1V
BWL＞1GHz
±1.4V @ 5 mV-122mV/div
±10V @ 124 mV-1V/div
1 MΩ:
±1.6 V @ 2 mV - 4.95 mV
±4 V @ 5mV - 9.9 mV
±8 V @ 10mV - 19.8 mV
±16 V @ 20mV - 140 mV
±80 V @ 142mV - 1.4 V
±160 V @ 1.42mV - 10V
DC Vertical Offset Accuracy ±(1.5% of offset setting +1% of full scale + 1 mV) (test limit)
　

Horizontal System
Clock Accuracy ≦1.5 ppm +(aging of 0.5 ppm/yr from last calibration)
Trigger and Interpolator Jitter ≦ 2.5 psrms (typical)
＜0.1 psrms (typical, software assisted)
External Clock DC to 100 MHz; (50 Ω/1 MΩ), EXT BNC input, Minimum rise time and amplitude requirements apply at low frequencies.
　

Acquisition System
Single-Shot Sample Rate/Ch 20 GS/s on 4 Ch
40 GS/s on 2 Ch
Memory Options (4 Ch / 2 Ch / 1Ch) S-32 Option:
32M / 64M / 64M
(15,000)
M-64 Option:
64M / 128M / 128M
(15,000)
Standard Memory (4 Ch / 2 Ch / 1Ch) (Number of Segments) 16 M / 32 M / 32M
(4,500)
　

Acquisition Processing
Enhanced Resolution (ERES) From 8.5 to 11 bits vertical resolution
　

Triggering System
Trigger Sensitivity with Edge Trigger (Ch 1–4) ProBus Inputs 2 div @ ＜ 2.5 GHz
1.5 div @＜ 1.25 GHz
1 div @ ＜ 200 MHz
0.9 div @＜10 MHz
(DC, AC, and LFRej coupling, ≧ 10 mV/div, 50 Ω)
External Trigger Sensitivity, (Edge Trigger) 2 div @ 1 GHz
1.5 div @ ＜ 500 MHz
1 div @ ＜200 MHz
0.9 div @＜10 MHz
(DC, AC, and LFRej coupling)
Max. Trigger Frequency, SMART Trigger 2.0 GHz @ ≧ 10 mV/div
(minimum triggerable width 300 ps)
　

High Speed Serial Protocol Triggering
Data Rates 320 Mb/s - 3 Gb/s
Pattern Length 80 bits, NRZ or 8b10b
Clock Recovery Jitter 1 ps rms + 0.3% Unit Interval rms for PRBS data patterns with 50% transition density
Hardware Clock Recovery Loop BW PLL Loop BW = Fbaud/5500, 100 Mb/s to 2.488 Gb/s (typical)
　

LeCroy WaveStream™ Fast Viewing Mode
Max Sampling Rate 20 GS/s (40 GS/s when interleaved)
　

Auxiliary Input
Max. Input Voltage 50 Ω: 5 Vrms; 1 MΩ: 250 Vmax (DC + Peak AC ≦ 10 kHz)
　
WaveRunner640Zi　スペック

Vertical System
Nominal Analog Bandwidth @ Ω 50 10 mV-1 V/div 4 GHz
(≧ 5 mV/div)
Rise Time (10–90%) 100 ps (typical)
Rise Time (20–80%) 75 ps (typical)
Input Channels 4
Bandwidth Limiters 20MHz, 200MHz, 1GHz
Input Impedance 50 Ω±2% or 1 MΩ||17pF, 10 MΩ || 9.5 pF with supplied Probe
Maximum Input Voltage 50 Ω: 5V RMS ± 10V peak
1 MΩ: 400 V max. (DC + peak AC ＜ 10 kHz)
Channel-Channel Isolation ＞ 100:1 up to 2.5GHz
＞ 50:1 from 2.5GHz to rated BW
Vertical Resolution 8 bits; up to 11 bits with enhanced resolution (ERES)
Sensitivity 50 Ω:1 mV/div - 1 V/div, fully variable
1 MΩ: 1 mV/div - 10 V/div, fully variable
DC Vertical Gain Accuracy (Gain Component of DC Accuracy) ±1% F.S. (typical), offset at 0V; ±1.5% F.S. (test limit), offset at 0V
Offset Range 50 Ω:
BWL≦1 GHz
±1.6 V @ 2 mV - 4.95 mV
±4 V @ 5mV - 9.9 mV
±8 V @ 10mV - 19.8 mV
±10 V @ 20mV - 1V
BWL＞1GHz
±1.4V @ 5 mV-122mV/div
±10V @ 124 mV-1V/div
1 MΩ:
±1.6 V @ 2 mV - 4.95 mV
±4 V @ 5mV - 9.9 mV
±8 V @ 10mV - 19.8 mV
±16 V @ 20mV - 140 mV
±80 V @ 142mV - 1.4 V
±160 V @ 1.42mV - 10V
DC Vertical Offset Accuracy ±(1.5% of offset setting +1% of full scale + 1 mV) (test limit)
　

Horizontal System
Clock Accuracy ≦1.5 ppm +(aging of 0.5 ppm/yr from last calibration)
Trigger and Interpolator Jitter ≦ 2 psrms (typical)
＜0.1 psrms (typical, software assisted)
External Clock DC to 100 MHz; (50 Ω/1 MΩ), EXT BNC input, Minimum rise time and amplitude requirements apply at low frequencies.
　

Acquisition System
Single-Shot Sample Rate/Ch 20 GS/s on 4 Ch
40 GS/s on 2 Ch
Memory Options (4 Ch / 2 Ch / 1Ch) S-32 Option:
32M / 64M / 64M
(15,000)
M-64 Option:
64M / 128M / 128M
(15,000)
Standard Memory (4 Ch / 2 Ch / 1Ch) (Number of Segments) 16 M / 32 M / 32M
(4,500)
　

Acquisition Processing
Enhanced Resolution (ERES) From 8.5 to 11 bits vertical resolution
　

Triggering System
Trigger Sensitivity with Edge Trigger (Ch 1–4) ProBus Inputs 2 div @ ＜ 4 GHz
1.5 div @＜ 2 GHz
1 div @ ＜ 200 MHz
0.9 div @＜10 MHz
(DC, AC, and LFRej coupling, ≧ 10 mV/div, 50 Ω)
External Trigger Sensitivity, (Edge Trigger) 2 div @ 1 GHz
1.5 div @ ＜ 500 MHz
1 div @ ＜200 MHz
0.9 div @＜10 MHz
(DC, AC, and LFRej coupling)
Max. Trigger Frequency, SMART Trigger 2.0 GHz @ ≧ 10 mV/div
(minimum triggerable width 200 ps)
　

High Speed Serial Protocol Triggering
Data Rates 320 Mb/s - 3 Gb/s
Pattern Length 80 bits, NRZ or 8b10b
Clock Recovery Jitter 1 ps rms + 0.3% Unit Interval rms for PRBS data patterns with 50% transition density
Hardware Clock Recovery Loop BW PLL Loop BW = Fbaud/5500, 100 Mb/s to 2.488 Gb/s (typical)
　

LeCroy WaveStream™ Fast Viewing Mode
Max Sampling Rate 20 GS/s (40 GS/s when interleaved)
　

Auxiliary Input
Max. Input Voltage 50 Ω: 5 Vrms; 1 MΩ: 250 Vmax (DC + Peak AC ≦ 10 kHz)
　
上位モデル/下位モデル
　 下位モデル 同等モデル 上位モデル
　
モデル名 Wavesufer MXs-B WaveRunner HRO 6Zi WavePro 7Zi-A
帯域 200MHz〜1GHz 400MHz〜600MHz 1.5〜6GHz
サンプリング速度 5〜10GS/s 2GS/s 20〜40GS/s
標準メモリ 16 Mポイント/ch 16 Mポイント/ch 20 Mポイント/ch
　   詳細 詳細 詳細

WaveRunner 6Zi　スペック詳細 （PDF:700K）

ページトップへ  


卓越したデバッグ能力、解析能力と動作確認
WaveRunner 6Ziシリーズは、内部雑音を可能な限り最小化し、 これまでにない信号忠実度を実現しています。 この性能は、オフセット、ディレイ、ズームなど垂直方向、水平方向のあらゆる波形操作に対しても変わることなく、 究極の信号忠実度を実現できます。


WaveRunner6Zi デモビデオ

広範囲なシリアルデータ通信の解析

WaveRunner 6Ziシリーズは、シリアルデータ通信の解析に優れた機能を発揮します。17種類ものトリガ機能、デコード・パッケージ、コンプライアンス・テストソリューションが用意されています。WaveRunner 6Ziシリーズは、独自の方法とツールで問題に焦点を当てます。独特な測定ツールとしてProtoSyncが挙げられます。これはシリアルデータ情報を波形に重ね描きする方法で表示するものです。

究極の信号忠実度

WaveRunner6Ziシリーズは、内部雑音を可能な限り最小化し、これまでにない信号忠実度を実現しています。 この性能は、オフセット、ディレイ、ズームなど垂直方向、水平方向のあらゆる波形操作に対しても変わることなく、 究極の信号忠実度を実現できます。

スーパーノブ

WavePilotと呼ぶこの新しい操作機能は、カーソル、デコード表示、WaveScan、ヒストリ表示、 LabNotebookやスペクトラム波形表示を制御する専用のノブです。 スーパーノブは、ジョイスティック状のノブで、操作パネルのほぼ中央に位置します。 これにより、表形式で表示される波形情報の選択、ズーム操作などの波形の表示位置の変更などが簡単に操作することができます。 画面の左にあるボタンを操作すると、画面だけが90度回転し、垂直方向に長い表示に変わります。 これは時間軸を揃えて縦方向にいくつかの波形を表示する際に非常に便利な機能です。

問題点の切り分けに役立つトリガ機能

広帯域エッジトリガに加えて標準で搭載されている10種類のSMARTトリガと、 4つの連続して設定できるカスケード・トリガ、計測式トリガ、及びトリガスキャン機能の組み合わせにより、 問題点の切り分けに役立ちます。計測式トリガは計測結果に応じた判定を行い、 それをトリガ条件とします。これにより時間分解能を高く保ったまま表示することができます。 高速シリアルパターントリガは、最高3Gb/sと80ビット長に対応したパターントリガを使用することができます。 またシリアルトリガ機能として、I2C、SPI、UART、RS-232、Audio(I2S、LJ、RJ、TDM)、 CAN、LIN、FlexRay、MIL-STD-1553、SATA、PCIe、8B/10b、USB2などがサポートされています。

回転式ディスプレイ

12.1インチのWXGAワイド・スクリーンは、様々な信号波形の表示に最適な形にデザインされています。 ワイド・スクリーンは、ロングメモリを活かした波形のズーム操作やスクロール操作など様々な波形表示のために理想的な形です。 90度回転する表示は、信号波形、ジッタ・トラック表示、アイ･パターン表示や周波数スペクトラム表示をする際に最適化されます。 表示画面は、画面を回転すると自動的に回転します。画面は傾けることができるので、反射により見辛い場合などに有効です。

ページトップへ

クリックで詳細表示されます

ミックスド・シグナル・ソリューション

メモリオプション

サンプリングレート・オプション

ハードウエア・オプション

リモート・コントロール/ネットワーク・オプション

電源解析

トリガ／デコード・オプション

ジッタ解析パッケージ

デジタル・フィルタ・オプション

コンプライアンス・テスト・オプション

シリアル・データ解析

その他のソフトウェア・オプション

その他

Synchronize Oscilloscope Options

データストレージ解析

ミックスド・シグナル・アクセサリ

テスト・フィクスチャ

クリックで詳細表示されます

プローブ・アダプタ

アクティブ・プローブ

電流プローブ

差動アンプ

差動プローブ

高圧差動プローブ

高圧プローブ

O/E変換器

パッシブ・プローブ

プローブ・キット