Click model number for photo
OCTAL LOGIC MATRIX
- Programmable CAMAC Logic 16 x 8 Matrix
- High Speed, 75 MHz Throughput
- High Density, 16 Inputs Per #1 CAMAC
- 8 Parallel Logic Functions
- Logic Fan-In
- Fast Veto
- Continuous Memory, Battery Backup
- Analog Multiplicity Output
VERSATILE BOOLEAN TRIGGER LOGIC ARRAY
The Model 2365 Octal Logic Matrix is a versatile, programmable 75 MHz logic
unit designed for trigger applica tions involving high speed logic arrays.
It allows complete programmability of all 8 logic functions. The unit is
ideal for specifying triggers based upon roadways through hodoscope arrays.
An analog multiplicity output via a front -panel Lemo connector is provided
for triggering on multitrack events.
The Model 2365 is a general purpose trigger logic module which provides
logic functions in a flexible compact format. Together with the other members
of the ECLine logic family (Series 2300, 4400 and 4500 modules), it allows
prompt triggers to be configured under computer control.
The Model 2365 Octal Logic Matrix is a general purpose trigger logic module
which accepts 16 differential ECL inputs. These signals are applied to each
of the eight independent logic channels. The outputs are differential ECL
levels on a standard ECLine header. Two outputs are provided per channel.
The 16-bit input size is most useful for large counter arrays, minimizing
the need to cascade logic units. This results in lower cost and shorter
overall trigger propagation delay.
The logic matrix for the Model 2365 is shown in Figure
1. Each channel is comprised of a series of programmable select gates
which allow a wide variety of Boolean logic combinations to be assigned.
These functions include:
Input Selection - Switchyard
Complementing - Input and Output
OR - Logic Fan-In
AND - Coincidence
Veto - Via Complementing Function
A CAMAC loadable test register in the Model 2365 adds to the versatility
of the unit. This register may be used in diagnostics for complete CAMAC
checkout of the trigger logic. The 16-bit pattern, loaded into the Test
Register, may be applied to the inputs of the logic matrix by a CAMAC command.
This operation simulates logic inputs for testing purposes. The eight outputs
of the logic matrix may also be read via CAMAC.
The test register also allows a sophisticated veto. One requirement of the
Logic Matrix is that the quiescent states of its outputs be defined by the
application. For this reason, the test register is used in the veto circuit.
Application of a fast front-panel ECL Veto Enable signal sets the inputs
to the pattern stored in the test register for the dura tion of the Veto
Enable pulse ( 10 nsec). If the quiescent input levels are loaded in the
test register, proper veto operation is achieved.
Number of Inputs: 16, differential ECL DC coupled; input impedance
100 ohm, high impedance by user option, reflections < 10% for signals
of 2 nsec rise time.
Minimum Input Pulse Width: 7 nsec FWHM, worst case.
Input Data Rate: DC to (> 75 MHz).
Input Connector: 17 pair front-panel header.
Veto Enable: Differential ECL input via 2-pin header. Input impedance
100 ohm, high Z by simple user modifica tion. When asserted, the contents
of the 16-bit CAMAC programmable test register are applied to the logic
matrix overriding the front-panel inputs. Minimum width 7 nsec. Must precede
the input by 5 nsec.
Logic Outputs: Two per channel, 16 total; ECL levels, via a 34-pin
header with pinouts to match the ECLine standard. Output width equals duration
of logic condition.
Output Data Rate: DC to 75 MHz guaranteed.
Propagation Delay: < 10 nsec.
Analog Multiplicity: Front-panel Lemo output provides 2 mA for each
logic matrix output in the logical 1 state. Rise and fall time < 4 nsec.
Continuous Memory: Memory battery backup. This feature preserves
contents of memory and test register during CAMAC power down. Life of the
battery is two years of operation.
MODE OF OPERATION
Data Execute: The 16 ECL input levels are applied to the octal logic
matrix. Selected by the CAMAC Mode Selector bit.
Test: The contents of the 16-bit test register are applied to the
logic inputs. Selected by the CAMAC Mode Selector bit.
Veto: The contents of the test register are applied to the logic
inputs. Selected via front-panel Veto Enable input.
SOFTWARE SELECTED LOGIC COEFFICIENTS
(See Figure 1 and Table 1)
Ai,j: AND Selector. When set to logical 1, routes the compliment of
the i th input to the jth logic matrix OR. When Aij = 0, compliment unused.
Bi,j: OR Selector. When set to logical 1, routes the i th input to
the jth logic matrix OR. When Bij = 0 normal signal unused.
Cj: Output Complimentor. When set to logical 1, routes the compliment
of the j th logic matrix OR to the jth output. When Cj = 0, the normal OR
Packaging: In conformance with CAMAC standard for nuclear modules
(ESONE Committee Report EUR4100 or IEEE Report 583. RF-shielded CAMAC #1
Power Requirements: < 400 mA at +6 V; < 2.5 A at -6 V.
X: An X = 1 response is generated for any valid N·F·A.
Q: A Q = 1 response is generated for F(0)·A(0) and F(16)·A(0).
A Q = 0 response is generated at the eighteenth successive command (terminal
count). This Q response is valid only if a F(9)·A(0) has been performed
at power up.
CAMAC FUNCTION CODES
F(0)·A(0): Read 16-bit programming word. Eighteen successive
read commands must be done to complete read operation and reinitialize the
2365 for logical operation.
F(0)·A(1): Read 16-bit input pattern. The ECL logic levels at
the input must be static during the read cycle.
F(0)·A(2): Read 8-bit output word. Outputs must be static during
the read cycle.
F(0)·A(3): Read Mode Selector bit (0 indicates Front-Panel mode;
1 indicates Test mode).
F(9)·A(0): Initialize the Model 2365. This operation is required
on power up.
F(16)·A(0): Write 16-bit programming word. Requires eighteen
successive write commands.
F(16)·A(3): Write Mode Selector bit (0 indicates Front-Panel
mode; 1 indicates Test mode).
Copyright© September 1995. LeCroy is a registered trademark of
LeCroy Corporation. All rights reserved. Information in this publicaction
supersedes all earlier versions.