Model | 2551 | 4434 | 4448 | |
GENERAL | ||||
Function | Counter | Latching Counter | Latch | |
No. of Inputs | 12 | 32 | 48 | |
Rate (MHz) | 100 | 20 typical, 30 instantaneous | 150 MHz typical | |
Capacity | 24 bits or 48 bits by cascading channels | 24 bits (16,777,215 counts) | Ñ | |
Double Pulse Resolution | 10 nsec | < 30 nsec | 8 nsec max., 6 nsec typical | |
INPUTS | ||||
Signal | NIM into 50 ohm | Differential ECL (TTL factory option) | Differential ECL | |
Clear | NIM -500 mV, ³ 50 nsec clears all channels within 1 µsec or via CAMAC command | NIM (TTL) > 20 nsec, will disable inputs for 100 nsec and clear scalers or via CAMAC command | 2 nsec settling time after command, -600 mV, > 5 nsec | |
Inhibit/Veto/Gate | > 5 nsec must precede input by 10 nsec or via CAMAC inhibit, -500 mV | NIM (TTL) pulse or via CAMAC inhibit must completely overlap inputs | NIM -600 mV, > 3 nsec or via CAMAC inhibit | |
OUTPUTS | ||||
Data Output | Via CAMAC | Via CAMAC or via auxiliary bus | Via CAMAC | |
Miscellaneous Output | n/a | Total of 16 4434s may be integrated to auxiliary bus. | 3 summing outputs from each 16 input group. -100 mV ±10% presented for each register latched. | |
POWER CONSUMPTION | ||||
+6 V | 1.2 A | 3.1 A (ECL version) 2.8 A (TTL version) | 400 mA | |
-6 V | 100 mA | 400 mA (ECL version) 40 mA (TTL version) | 1.9 A | |