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6810 Waveform Recorder

6310 Memory


The LeCroy 6810 Waveform Digitizing/Recording system captures entire single-shot waveforms using digital storage techniques. Conversion of your analog waveform into digital data simplifies waveform analysis and allows storage on floppy disks and hardcopies on printers. The system is expandable in steps of 512K samples up to 8 megasamples.


The LeCroy Model 6810 Waveform Recorder combines powerful waveform recording features not found else where in modular instruments. The 6810 features mean simple solutions for applications, including:
The 6810 is a complete independent recording system. Thus, it provides unprecedented total system perfor mance for measuring DC to 2.5MHz signals. The 6810 includes wide-range differential amplifiers, track and hold circuitry, a high resolution analog-to-digital converter (ADC), powerful triggering circuitry and on-board waveform memory. The memory can be expanded via the LeCroy Model 6310 Memory Module.

6810 Block Diagram

System Architecture Diagram

Extended Multi-Channel 6810 System


The Model 8007 benchtop mainframe can hold one 6810 module for up to 4 channels. The Model 8025 rackmount mainframe can hold five 6810 modules for up to 20 channels.


The 6810 contains four input channels with independent configuration, gain, offset and AC or DC coupling. Each channel has both a non-inverting (+) and an inverting (-) input connector. The inputs can be configured in the following four different combinations:
Single-ended inputs can allow external electrical noise to mix with the desired waveform. The 6810 differential inputs reject common mode noise and transducer bias voltages; they measure only the voltage difference be tween the inputs.

The 6810 module uses one selectable setting for all four channels for memory length, sample rate, pretrigger waveform length, trigger delay time and trigger source.


The 6810 sample rate can be programmed from 20 samples per second up to 5 million samples per second. The sample rate steps occur in a 1, 2, 5 sequence, just like an oscilloscope. The maximum sample rate depends upon the number of active channels:

One Channel Mode: 5 MS/sec max.
Two Channel Mode: 2 MS/sec max.
Four Channel Mode: 1 MS/sec max.

Common Mode Voltage Rejection Diagram

The 6810 can also use an external clock source to establish the sample rate. Thus, the 6810 can be synchronized to your experiment or test. The external source can be any frequency from DC to 5 MHz.


A special dual timebase mode conserves waveform memory. It changes the sample rate during a waveform acquisition. A fast sample rate resolves detailed waveform sections. A slower rate conserves memory at other times. The user may select any two sample rates.

The user may assign either sample rate, f1 or f2, to the pretrigger waveform section, the post-trigger-near section and the post-trigger-far section. When in segmented memory mode, (see "Memory Segmentation") these three sections apply to each individual memory segment. Three f1/f2 combinations exist:

Table 1: f1/f2 Combinations

The user also selects the post-trigger-near section size. It may be as small as 4 samples or as large as all the post-trigger samples.


Accurate multichannel comparisons and analysis, such as current and voltage monitoring for power calculations, demand simultaneous sampling. The 6810 uses track and hold circuits on each input channel (see 6810 block diagram). One sample clock controls all track and holds. Therefore, all four channels sample their inputs simulta neously, rather than sequentially like most other multiplexed systems. In addition, the 6810 superb channel isolation prevents voltages on one channel from corrupting measurements on another channel.


The 6810 contains a high accuracy, 12-bit resolution, analog-to-digital converter. In addition, each 6810 channel has eight input ranges from 400 mV to 100 V full scale. The combination of high resolution and multiple ranges means the 6810 can accurately record a waveform of almost any amplitude.

The 12-bit resolution equates to 4096 different detectable input levels. Thus, the 6810 can measure 100 µV changes when on the 400 mV range. Further improvement in resolution can be achieved by the user through repetitive waveform averaging in the host computer.


The 6810 stores digitized waveform data in fast memory. It contains 512K samples of memory. Model 6310 Memory Expansion modules add 512K samples each. A maximum of 15 memory modules expand the system memory to 8 megasamples.

The 8 megasample system supplies a full 8 seconds of continuous recording time at a 1 MS/sec sample rate or more than six minutes at 20 kS/sec.


The 6810 memory can be divided into a maximum of 1024 segments. Each segment requires a separate trigger signal to initiate recording. Thus, numerous pulses can be recorded quickly without reading out the memory after each capture, and without recording the dead time between pulses. In this segmented memory mode, the 6810 can record up to 4880 waveforms per second (5 MS/sec, 1024 point segment).

The segmented memory mode also helps to precisely reconstruct the timing of intermittent waveforms. The 6810 records the trigger-to-trigger times from segment to segment. This trigger time stamp clock has variable resolu tion. The long time stamp buffer shows up to 72 minutes between triggers with 1microsecond resolution, up to 16 months with 10 msec resolution.


All active 6810 input channels use the same trigger. The 6810 module will trigger when the trigger source meets specific waveform conditions or when a software trigger command occurs. Either an external trigger input, the Channel 1 signal, or the Channel 2 signal can act as the trigger source.

Trigger Modes Diagram

The 6810 supplies five different trigger condition selections:
Positive or Negative Slope triggering simply occurs at a selected voltage level on the positive or negative slope of the trigger source signal.

Window Triggering occurs when the trigger source signal passes in a positive direction through an upper trigger level or in a negative direction through a lower trigger level. The upper and lower levels are independent user -selected voltages.

Positive and Negative Hysteresis triggering makes the trigger point less susceptible to noise. A trigger will only occur after the signal has crossed a hysteresis level. This level can be thought of as a "trigger enable".


All 6810 functions (gain, offset, coupling, etc.) are programmable and can be controlled remotely via any CAMAC controller. The LeCroy Model 8901A controller is recommended because it provides this bidirectional GPIB (IEEE -488) communication. A host computer can download control and setup commands to the 6810 and upload waveforms from the 6810.


All specifications refer to the guaranteed minimum performance of the entire 6810/6310 digitizing system unless otherwise stated. All selectable parameters are IEEE-488 bus and IEEE-583 (CAMAC) bus programmable.


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2 BNC type coaxial per channel (+ and -).

Quantity: 4 input channels, simultaneously sampled.

Active Number of Channels: 1, 2 or 4.

Channel Isolation: 66 dB minimum between any two channels.

Input Modes:

1. Differential (both + and - active)
2. Non-inverting (+ active, - grounded)
3. Inverting (- active, + grounded)
4. Both connectors grounded.

Common Mode Rejection Ratio: (differential input mode):

0.4 V, 1 V, 2 V, 4 V ranges:
Typically 66 dB @ DC, 50/60 Hz, 400 Hz
Typically 63 dB @ 100 kHz (60 dB guaranteed)

10 V, 25 V, 50 V, 100 V ranges:
Typically 54 dB @ DC, 50/60 Hz, 400 Hz
Typically 51 dB @ 50 kHz (40 dB guaranteed)

Common Mode Voltage: 125 V max. on 10 V, 25 V, 50 V and 100 V ranges; 5 V max. on 0.4 V, 1 V, 2 V, and 4 V ranges.

Bandwidth: DC to 2.5 MHz minimum.

Coupling: AC or DC.

Input Impedance: 1 Mohm, 40 pF.

Voltage Range: Selectable in 8 steps.

Overload Protection: ±100 VAC or DC continuous.

Overload Recovery Time: 1 µsec to within ±1.5% from a 3X full scale, 10 µsec duration input.

DC Gain Non-linearity: ±0.1% maximum of full scale

Offset: Up to ±50% full scale. Selectable in 256 steps.

Full Scale Input Voltage vs. Sensitivity Chart


Internal Sample Clock Rates:
5M*, 2M**, 1M, 500K, 200K, 100K, 50K, 20K, 10K, 5K, 2K, 1K, 500, 200, 100, 50, or 20 samples/sec.
* 1 channel mode only
** 1 or 2 channel modes only

Dual Timebase: 2 selectable timebase changes within each memory segment. Sample rate changes at trigger point and 'N' samples after the trigger point in any combination.

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Clock In: BNC connector; any external frequency from DC to 5 MHz must be a 74 HC series TTL compatible signal.

Clock Out: BNC connector; buffered internal sample clock; 50 ohm drive capability; short circuit protected; 40 nsec maximum propagation delay; "Clock In" to "Clock Out".


1:4096 (12 bits).

Aperture Uncertainty: < 50 psec at 5 MHz internal clock rate.


Minimum Trigger Signal Duration:
50 nsec.

Trigger Source: Selectable from either external (Trigger In), internal, or manual (bus command)

Trigger In: BNC connector; 1 MW input impedance; protected to ±50 V; range from -5 V to +5 V.

Internal Trigger: Pickoff from Channel 1 or 2; range from - full scale to + full scale.

Trigger Level: 256 steps across range; 1 level for single slope trigger modes; 2 independent levels for window and hysteresis modes.

Trigger Modes: Positive slope, negative slope window, positive hysteresis, negative hysteresis.

Trigger Coupling: DC, AC; low frequency reject (-3 dB at 36 kHz, 20 dB/decade roll off); high frequency reject ( -3 dB at 36 kHz, 20dB/decade roll off).

Trigger Not Accepted During:

1. Programmed "Trigger Disable"
2. Pre-trigger recording when "Trigger Holdoff" enabled
3. Post-trigger recording
4. First 160 microseconds after last post-trigger sample in the previous memory segment

Trigger Out: BNC connector; trigger signal for synchronized multiple 6810 operation; 50 ohm drive capability; short circuit protected; 80 nsec maximum propagation delay "Trigger In" or internal trigger to "Trigger Out".

Pretrigger: Portion of memory filled with waveform data occurring before valid trigger condition. Selectable in 1 /8ths of the memory segment length from 0/8 (100% post trigger data) to 8/8 (100% pretrigger data).

Delayed Trigger: Time delay from valid trigger condition to the start of memory segment recording. Selectable time T=(L)(S)(P) where:

L = selectable memory segment length fractions (1/8 to 247/8)
S = number of samples per memory segment
P = sample interval

Example: Sampling at 1 MS/sec with a segment length of 4096 samples and a delay
trigger setting of 19/8 yields 9.73 msec delay after the trigger before recording begins.
(1 µsec/sample)(4096)(19/8) = 9.73 msec

Time Stamps: The elapsed time from Arm to first Trigger, from first Trigger to second Trigger, and so on, each value stored in a buffer. Applies when number of channel memory segments > 1; 1024 time stamp buffers (bus readable as a block); 32-bit resolution.

Selectable Time Sensitivity:

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512K samples.

Expansion: Additional 512K samples per each Model 6310 Memory module; 8M samples maximum total memory via 15 Memory modules; total memory required for application = (S)(G)(C) where:

S = number of samples per memory segment
G = number of memory segments
C = number of active channels (1, 2 or 4)

Segmentation: Memory divided into segments; separate trigger for each segment, records only to end of segment for each trigger. Selectable pretrigger/post-trigger percentage; percentage same for all segments on all channels. Dual timebase for each segment, same mode for all segments.

Segment Size: Selectable in binary increments from 1024 samples to the full memory length.

Segment Record Rate: Sample rate divided by samples per segment 4880 segments/sec maximum (5 MS/sec, 1024 sample segment).


1. Entire active memory
2. Any active channel's memory
3. A memory section starting at any particular segment sample point (Offset command) and terminating at any other sample point in active channel memory (Abort command)

Readout Rate: 225K samples/second maximum via LeCroy 8901A IEEE-488 Interface.


STATUS OK - Received valid setup command across bus. ARMED - Currently digitizing. TRIG'D - Trigger accepted and 6810 now digitizing post-trigger samples, if any selected.

Module I.D.: Bus readable binary value "6810".


R.F. shielding in conformance with IEEE-583 Standard (CAMAC).

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Operating Temperature
: +15° to +35° C (IEEE-583 instrument mainframe maximum exhaust temperature must be less than 50° C).

Storage Temperature: -10 to +50° C storage.

Operating Humidity: 10% to 90% non-condensing.

Operating Altitude: 0 to 10,000 feet above sea level.


6810 ­p; Waveform Digitizer Module

6310 ­p; 512K sample Memory Expansion Module



Block read data.

F(2)·A(1): Block read registers.

F(3)·A(0): Module ID.

F(8)·A(0): Test LAM Set and Enabled.

F(9)·A(0): Arm*.

F(9)·A(1): Reset.

F(10)·A(0): Clear LAM.

F(11)·A(0): Test CAMAC Lock Out.

F(16)·A(0): Set Time Stamp Resolution.

F(16)·A(1-4): Set Channel 1-4 Sensitivity.

F(16)·A(5): Set "Block Size" for data readout (use before first read).

F(16)·A(6/7): Set Offset in "Blocks" for "Read Channel #", low byte A(6); high byte A(7).

F(16)·A(8): Set Trigger Holdoff Enable.

F(16)·A(9): Set Trigger Slope.

F(16)·A(10): Set Trigger Coupling.

F(16)·A(11): Set Trigger (upper level for window trigger).

F(16)·A(12): Set Trigger Lower Level for Window Trigger.

F(16)·A(13): Set Trigger Source.

F(16)·A(14/15): Set low byte A(14)/high byte A(15), post-trigger number of samples.

F(17)·A(0): Set number of active channels (= # words/sample).

F(17)·A(1-4): Set Channel 1-4 Analog Input Offset.

F(17)·A(5-8): Set Channel 1-4 Source & Coupling.

F(17)·A(9): Set Trigger Delay.

F(17)·A(10): Set number of samples per segment.

F(17)·A(11/12): Set low byte A(11)/high byte A(12), number of segments.

F(17)·A(13): Set Dual Timebase Mode.

F(17)·A(14): Set F1 Clock Code.

F(17)·A(15): Set F2 Clock Code. [F(2)·A(1), actually reads the data].

F(18)·A(0): Prepare to read setup.

F(18)·A(1-4): Prepare to read Channel 1-4. Causes CAMAC lock out.

F(18)·A(5): Prepare to block read from memory. Causes CAMAC lock out.

F(18)·A(6): Verify setup. Causes CAMAC lock out.

F(18)·A(7): Internal Diagnostic Tests. Causes CAMAC lock out.

F(18)·A(10): Prepare to Read Trigger Address.

F(18)·A(11): Prepare to Read Time Stamp.

F(19)·A(1): Block Write Setup Registers.

F(19)·A(2): Active Memory Size.

F(24)·A(0): Disable LAM.

F(25)·A(0): Trigger.

F(25)·A(1): Abort.

F(26)·A(0): Enable LAM.

F(27)·A(1): Test LAM set.

Copyright© September 1995. LeCroy is a registered trademark of LeCroy Corporation. All rights reserved. Specifications are subject to change.