Summit Z74 Protocol Exerciser and Analyzer

Request a Quote

Overview

PCIe 7.0 Speeds

A Wealth of Features

Debug in any PCIe environment

Overview

Accelerate PCIe® 7.0 device validation, debug, and compliance development with the Summit™ Z74 Protocol Exerciser, Teledyne LeCroy’s next-generation PCI Express 7.0 validation platform. Designed to help engineers develop, debug, and validate systems operating at data rates up to 128 GT/s. The platform combines advanced traffic generation, protocol stimulation, error injection, and link training control to address the challenges associated with PCIe 7.0 development.

PCIe 7.0 Speeds

With advanced features such as support for PCI Express Spec 7.0, data rates of 2.5, 5, 8, 16, 32, 64 and 128GT/s, link widths from x1 to x4, Summit Z74 Protocol Exerciser provides unmatched capability and flexibility for developers and users of advanced PCI Express products. The Summit Z74 is by far the most advanced and sophisticated PCI Express Exerciser available in the market today.

z74

A Wealth of Features

Intuitive software controls blend sophisticated traffic generation when used with a Summit M616 series analyzer with ease-of-use, allowing test suites to be rapidly customized to meet specific test requirements. One feature that helps troubleshoot PCIe-based links is the ability to fully exercise the Link Training & Status State Machine (LTSSM) transitions. Powerful scripting language also allows for the creation of Transaction Layer Packets (TLPs) and Data Link Layer Packets (DLLPs) at PCIe 7.0 data rates of 128.0 GT/s. Flow Control and ACK/NAK's policies and structures can be defined and generated under user control.

Features addressing LTSSM structures include providing bus traffic to emulate all the states of the LTSSM from the Detect state, to the L0 state and maintaining the L0 state between the host and device. The exerciser also supports lane reversal and can control all polarity and scrambling configurations. An important feature to note is that traffic emulation supports dynamic equalization in addition to skipping the EQ phases entirely. The exerciser also has the capability to perform error injection for training sequences, as well as Data Link and Transaction Layer traffic, both at the packet level and on a per lane basis.

Packet fields not explicitly specified by the user are generated automatically (such as packet numbering and CRCs). The configuration space can be emulated for any device including endpoints, bridges and switches. Support for all PCIe 7.0 data rates allows the Summit Z74 to produce test cases that test the device's ability to auto-negotiate data rates with other devices.

In addition, the ability of the Summit Z74 to produce a wide variety of programmed traffic allows the user to introduce controlled error conditions. As an example, a trace file captured by the external Summit series PCIe protocol analyzer can be exported and used as the basis for a test script, with selected programmed errors introduced at critical stages to test the device's ability to recognize and recover from error conditions. This allows for detailed testing of simple error recovery and complex multiple error conditions, creating more resilient products that perform well even under less than ideal conditions.

Debug in any PCIe environment

By leveraging years of experience in protocol tools for emerging markets, Teledyne LeCroy's PCI Express protocol tools blend sophisticated functionality with practical features to speed the development of PCI Express IP cores, semiconductors, storage, graphics, servers, workstations, bridges, and switches.

Resources

Name

Testing PCI Express® L0p Low Power State Using Teledyne LeCroy Protocol Analysis and Exerciser Tools

White Paper

Summit Z74 Datasheet

Datasheet
PCIe 6.0 Interop with Intel’s PCIe 6.0 Test Chip at Intel Innovation 2023
PCI Express 6.0 Protocol Analyzer/Exerciser Demo with Synopsis Endpoint