Software Options


The PCIe 6.0 decode (PCIE6BUS D) option provides an intuitive decoder enabling users to quickly debug a PCIe 6.0 active link in conjunction with PCIe 5.0, 4.0, 3.0, 2.0 and 1.0 active links, and the decoder utilizes features found in SDA Expert such as applying CTLE and DFE to open the eye at the end of a test channel.

Explore PCIE6BUS D arrow down
product title image
  • product line tab
  • overview tab
  • compatability tab
Key Features
  • Identify PCIe Gen6 Flow Control Units (FLITs)
  • Monitor Training Sequences, Skips, and Electrical Idle Exit Ordered Sets
  • Simultaneously decode PCIe Gen1 through Gen6
  • Verify speed changes
  • Apply equalization to waveform data for accurate decode
  • De-embed or embed effects of a channel using s-parameters
Identify PCIe Gen6 FLITs
screenshot of pcie 6.0 decode option

PCIe 6.0 introduces FLITs, a 256 Byte block of data, enabling PCIe to provide low latency with high efficiency. An active link will determine to enable FLIT mode during the power on cycle. The PCIe 6.0 decoder quickly identifies FLIT data packets.

Simultaneously View All Decoded PCIe Data Rates
screenshot of pcie 6.0 decode option

A new decoder view allows users to simultaneously view the decode results for multiple PCIe data rates in one single result table.

SDA Expert Framework
screenshot of pcie 6.0 decode option

The SDAX framework performs multi-view/lane analysis, de-embedding, embedding, and emulate various equalizations such as CTLE, DFE, and FFE.

Support on Multiple Oscilloscope Platforms
screenshot of pcie 6.0 decode option

The PCIe 6.0 decode option is available on the LabMaster 10 Zi-A and WaveMaster 8000HD oscilloscope models with a bandwidth of 30 GHz or higher.


WaveMaster 8000HD

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LabMaster 10 Zi-A Oscilloscopes

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