Software Options

DDR Debug Toolkit

The DDR Debug Toolkit is designed to accelerate DDR design work in the early turn-on, validation and pre-compliance stages as users prepare for compliance testing. Integrated into the MAUI scope app, users can build out case by case scenarios with multiple analysis areas, perform decode and triggering on the Command Bus and dive into optimizing design stages with JEDEC specific eye diagrams, mask testing and DDR specific measurements.

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Key Features
  • Supports DDR2/3/4/5 and LPDDR2/3/4/4X
  • Test speeds up to 8533 MT/s
  • Supports early turn-on through compliance stages of design
  • Integrated into MAUI and used by QualiPHY for failure analysis
  • Multiple Scenario Viewing – analyze & compare different setups on up to 4 viewing areas.
  • Includes DDR JEDEC defined measurements and jitter analysis
  • Includes DDR JEDEC defined eye diagram and mask testing
  • Industries only Command Bus decoding and triggering up to DDR5
  • Included in DDR5 Software Bundle


DDR Trigger and Decode
ddr triggering command

The command bus is a central part for host and DDR DRAM communication. Performing early validation testing means more than just electrical verification but also protocol. The oscilloscope can decode and trigger on 20+ protocol commands from the Command Truth Table as specified in the JEDEC standard. Then use the decoded command bus to accelerate eye and measurement analysis stages with the highly accurate R/W separation capability.

Multiple Scenario Viewing
ddr multiple scenario views

Accelerate pre-compliance testing and fine-tuning stages with 4 unique analysis viewing areas. These viewing areas can each represent their own channel selection, be Write or Read specific, make DDR measurements, eye diagram, mask testing and more. Enabling engineers to test Data, Strobe or Clock test points, analyze crosstalk, compare new designs and debug and root cause design issues.

JEDEC Defined Eye Diagram, Mask Testing
ddr eye diagram tests

Perform specific eye diagram tests, height and width opening measurements specifically on DDR read or write packets. Then use JEDEC defined masks to test the data or CA write bursts.

DDR Specific Measurements
ddr measurements

Each viewing area can provide statistical results for DDR specific read or write signals that are captured in a bidirectional acquisition. Make burst, Vref, VOH, VOL, setup and hold, skew, slew rate, a variety of jitter and timing specific measurements to the JEDEC standard.

DDR5 Software Bundle

The best tools cover all stages of design, from early turn-on through compliance. This means planning for the future, it might be testing DDR3 to DDR4 or upgrading to DDR5 designs. The DDR5 Bundle includes all the best tools (DDR Debug Toolkit + QualiPHY) across all generations, in a single purchasable software bundle.


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