Automates the DisplayPort 2.0 Source PHY Compliance Test Specification (CTS)
Automated Sink Calibration and PHY Compliance Tests using Anritsu MP1900A
Multi-Lane Testing provides the fastest testing available
Supports USB-C, Std/Enhanced DP, and mDP TPA test fixtures & AUX controller automation
Connection diagrams help to make sure that you get the correct setup on the first try
QualiPHY report generation creates comprehensive reports with all test information
QPHY-DP20-SOURCE SW automates all Source tests as defined in the DisplayPort 2.0 PHY CTS for Ultra High Bit Rates (UHBR10, UBRB13.5, and UHBR20) with Multi-Lane compliance testing for 1, 2, or 4 Lanes. Also included is QPHY SW for DisplayPort 1.4a (RBR, HBR, HBR2, and HBR3) data rates. Ideal for high volume test labs, the LabMaster 10 Zi-A can capture, analyze, and report results on two DisplayPort 2.0 lanes simultaneously - reducing user intervention and providing the fastest test times.
Multi-Lane Testing and Advanced Analysis
SDAIII-CompleteLinQ displays all four lanes during testing, providing real-time feedback on PHY signal integrity. Multi-Lane analysis can also be used to visualize the TP2 to TP3EQ signal path to analyze effects of the embedded cable, CTLE, and DFE on the source signal. To further analyze sources of jitter, each lane can be easily configured to show statistical and spectral jitter decomposition.
QPHY-DP20-SINK SW provides automated calibration and compliance testing for DisplayPort 2.0 data rates using the MP1900A.
Sink Channel Calibration
During Sink calibration, the ISI must be calibrated. The insertion loss (IL) of the DisplayPort Cable used for testing is measured to be within CTS limits; then the Total Channel IL of the channel is calibrated. The WavePulser 40iX High-speed Interconnect Analyzer provides cost effective 4-port, 40GHz s-parameter measurements in a small form factor accessible at the same test bench.