Summit M64 Protocol Analyzer and Exerciser

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PCIe 6.0 Technology

PCIe 6.0 Speeds

Powerful Views

Lan or USB Connectivity

Debug in any PCIe environment

PCIe 6.0 Technology

PCIe 6.x technology achieves twice the effective data throughput rate of the PCIe 5.0 standard through a combination of increased data bit rate (32 GT/s moving to 64 GT/s) and a move to PAM4 signaling. PCIe 6.x uses a similar protocol to PCIe 5.0 that has proven reliable for data transmission while leveraging advances in high speed serial technologies to meet modern compute requirements.

PCIe 6.0 Speeds

With advanced features such as support for PCI Express Spec 6.x, data rates of 2.5, 5, 8, 16, 32, 64GT/s, lane widths from x1 to x4, and a full 32 GB of trace memory, the Summit M64 Protocol Analyzer provides unmatched capability and flexibility for developers and users of advanced PCI Express products. The Summit M64 is by far the most advanced and sophisticated PCI Express Analyzer available in the market today.

Powerful Views

The Summit M64 application display is highly configurable and can be modified to most users' debugging styles. Many features are available including a hierarchical display, protocol traffic summaries, detailed error reports, timing calculators, bus utilization graphs, and the ability to create user defined test reports allowing developers to troubleshoot intricate problems and finish their projects on time. PCIe storage decodes such as NVMe, SATA Express (AHCI and ATA), SCSI Express (PQI and SOP), TCG (Trusted Computing Group), Precision Time Management (PTM) and virtualization decode such as Single and Multi-Root I/O Virtualization (SRIOV and MRIOV) as well as Address Translation Services (ATS) are available to broaden its capabilities to many different industry segments.

Lan or USB Connectivity

The Summit M64 also supports Ethernet LAN port as a standard feature. By connecting over a LAN, engineers can operate the system remotely (e.g., install the client software on their desktop systems, and control an analyzer operating in a remote lab). Also, multiple engineers working collaboratively can time-share use of a single analyzer, reducing the need for an additional analyzer for each engineer, and increasing the cost effectiveness of the product.

Debug in any PCIe environment

By leveraging years of experience in protocol analysis tools for emerging markets, Teledyne LeCroy's PCI Express protocol analyzers blend sophisticated functionality with practical features to speed the development of PCI Express IP cores, semiconductors, storage, graphics, servers, workstations, bridges, and switches.

Resources

Name

Summit M64 Datasheet

Datasheet
PCIe 6.0 Interop with Intel’s PCIe 6.0 Test Chip at Intel Innovation 2023
PCI Express 6.0 Protocol Analyzer/Exerciser Demo with Synopsis Endpoint
Name

Summit M64 Protocol Analyzer and Exerciser User Manual

Product Manual

Summit M64 Protocol Analyzer User Manual

Product Manual

Summit M64 Quick Start

Product Manual

Interposers and Probes

Interposers and probes compatible with the Summit M64

PCIe 6.0 CEM Interposer
PCI Express 6.0 - CEM x4 Interposer

The PCIe 6.0 CEM x4 Interposer supports data rates of 2.5, 5.0, 8.0, 16.0, 32.0 and 64 GT/s and supports link widths of up to x4. New TAP6 acquisition technology from Teledyne LeCroy is making it possible for accurate capture at up to PCIe 6.0 data rates for protocol analysis. This is done by reducing signal integrity issues and enhancing fidelity capabilities for protocol transmission acquisition.

PCIe 6.0 CEM Interposer
PCI Express 6.0 - CEM x8 Interposer

The PCIe 6.0 CEM x8 Interposer supports data rates of 2.5, 5.0, 8.0, 16.0, 32.0 and 64 GT/s and supports link widths of up to x8. New TAP6 acquisition technology from Teledyne LeCroy is making it possible for accurate capture at up to PCIe 6.0 data rates for protocol analysis. This is done by reducing signal integrity issues and enhancing fidelity capabilities for protocol transmission acquisition.

pcie express interposer
PCI Express 6.0 - CEM x16 Interposer with CrossSync PHY

The PCIe 6.0 CEM Interposer with CrossSync PHY support is a powerful and versatile tool for all developers working up to 64GT/s speed in their development projects.

PCIe 6.0x16 EDSFF Interposer Module
PCI Express 6.0 - EDSFF and OCP Interposers

The PCI Express 6.0 EDSFF and OCP Interposers are advanced tools designed for capturing and decoding PCIe traffic between host systems and EDSFF/OCP devices. These interposers support various protocols including NVMe, SOP/PQI, AHCI/PCIe, PCIe, and CXL, and are compatible with multiple EDSFF and OCP form factors. They offer high data rates up to 64.0 GT/s and provide comprehensive protocol analysis capabilities for enterprise and datacenter environments.

PCIe 6.0x16 EDSFF Interposer Module
PCI Express 6.0 - M.2 Interposer

Used with Summit™ Protocol Analyzers, the PCIe 6.0 M.2 Interposer enables PCIe bus traffic between a system board or tablet and an M.2 connector on a SSD device to be monitored, captured, and recorded for protocol analysis. The M.2 interposer will support analysis of PCI Express 6.0 and NVM Express (NVMe) Protocols at data rates from 2.5 GT/s up to 64.0 GT/s, and link widths of x1, x2 and x4

PCIe 5.0 EDSFF Interposer
PCI Express 5.0 - EDSFF Interposer

The PCIe 5.0 EDSFF Interposers provides connectivity and monitoring capability for E1.S, E1.L or E3.x type devices targeted at enterprise systems that use the SFF-TA-1002 multi-lane card edge connector. The interposer taps all PCIe protocol traffic between the host and EDSFF device or SSD and records it on the Summit PCIe 5.0 protocol analyzer where protocol issues and performance metrics can be further analyzed and debugged.

PCIe 5.0 M.2 Interposer
PCI Express 5.0 - M.2 Interposer

The PCIe 5.0 M.2 interposer provides connectivity and monitoring capability for M.2 connector based SSD memory modules targeted at thin client devices such as tablets. The interposer supports 30mm x 22mm, 42mm x 22mm, 60mm x 22mm, 80mm x 22mm , and 110mm x 22mm SSD lengths. This interposer optionally supports the CrossSync PHY technology enabling users to see and correlate both the physical and protocol layers in a unified time aligned view.

PCIe 5.0 MCIO Interposer
PCI Express 5.0 - MCIO Cable Interposer

The PCIe 5.0 MCIO Cable Interposes provides connectivity and monitoring capability for product designs that incorporate card edge connectors or cabled connector assemblies that utilize the MCIO mechanical connector based on the SFF-TA-1016 specification with PCIe 5.0, NVM Express (NVMe) or Compute Express Link (CXL) technologies.

PCI Express 5.0 - Multi-lead Probe Interposer
PCI Express 5.0 - Multi-lead Probe

The PCIe 5.0 Teledyne LeCroy Multi-lead probes allow developers using an embedded PCI Express bus in their PCB designs to tap into the signal traces directly and capture of each serial lane, allowing flexibility to connect to any accessible points on the surface of the PCB.

PCI Express 5.0 - OCP Interposer
PCI Express 5.0 - x16 OCP NIC 3.0 Interposer

The PCIe 5.0 OCP NIC 3.0 Interposer allows users to connect a Teledyne LeCroy T4/T5 PCIe(r) protocol analyzer between an OCP NIC 3.0 device and an OCP Server System to monitor, capture, record and analyze protocol traffic. The interposer supports data rates of 2.5 GT/s, 5.0 GT/s, 8.0 GT/s, 16.0 and 32 GT/s, side band signals such as PERST#, WAKE# and SMBus (SMBCLK, SMBDAT). The PCIe 5.0 OCP NIC 3.0 Interposer supports link widths up to x16 and single/multi-hosted configurations.

PCI Express 5.0 - U.2/U.3 Interposer
PCI Express 5.0 - U.2/U.3 Interposer

The PCIe 5.0 U.2/ U.3 (SFF-8639) Interposer is a PCIe Storage Interposer that makes it possible to analyze data traffic from PCIe SSD storage devices to PCIe Storage systems using the U.2/U.3 (SFF-8639) connector. It allows x4 NVM Express, x4SCSI Express or x2 SATA Express host interface based SSD traffic to be monitored, captured and recorded. It supports SRIS, CLCKREQ#, SMBus and Dual port mode when used with MultiPort software option.

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