This article explains how the inductance of passive probe ground leads can dramatically reduce effective bandwidth, distort measurements, and introduce resonance and frequency-response errors.
This tutorial explains a robust oscilloscope-based method for measuring clock jitter using period statistics, track and histogram analysis, and sample-rate verification techniques.
This article introduces the RP2060 and RP4060 power rail probes, designed for modern 48 V power architectures with high offset capability, low-noise measurements, and high-bandwidth power integrity analysis.
Anthony is a Program Manager at Teledyne LeCroy’s Austin Labs, and previously a PCIe Product Manager and an FAE. He holds a B.S.E.E. from The University of Texas at San Antonio. Anthony enjoys outdoor activities, especially hiking in the mountains.
PCIe 6.0’s move to PAM4 signaling introduces new compliance pattern measurements—SNDR, RLM, and ps21TX—that require updated test methodologies and noise-aware analysis.
PCIe 6.0 compliance requires SNDR and RLM results with oscilloscope noise removed—these three methods show how to compensate noise accurately in real test setups.
