This article explains the expected behavior of on-die power rails during CMOS switching events, including PDN current flow, clock-edge noise, and asymmetric current draw between switching and latching operations.
Learn how oscilloscope histograms help characterize component specifications by comparing propagation delay, mean, standard deviation, and measurement spread under different conditions.
Eric is a professor in the EE department at Colorado University, Boulder and a Fellow at Teledyne LeCroy. He has a BS in Physics from MIT and a PhD in Physics from the University of Arizona, Tucson. He enjoys DesignCon and writing for SI Journal.
Continuous Time Linear Equalization (CTLE) enhances high-speed serial signals by compensating for channel loss, improving eye openings while balancing noise performance.
S-parameters allow engineers to model, remove, or simulate channel effects in high-speed serial links, helping diagnose signal degradation and improve performance.
This practical walkthrough shows how to measure and diagnose ground bounce using oscilloscope techniques, quiet-low sense lines, and controlled I/O switching scenarios.
Ground bounce occurs when simultaneous switching currents flow through shared inductance in IC packages, creating voltage noise that can lead to digital bit errors.
Ground bounce occurs when multiple switching signals share a high-inductance return path, creating voltage noise that can disrupt digital I/O performance.
Broad dips in S-parameter plots typically result from stub resonances, where reflected signals interfere with the main signal path and reduce transmission at specific frequencies.
A monotonic drop-off in S21 indicates increasing signal attenuation with frequency, typically caused by dielectric and conductor losses in the interconnect.
Ripple patterns in S-parameters are caused by reflections from impedance discontinuities, with ripple spacing determined by interconnect length and ripple magnitude driven by impedance mismatch.
Sharp dips in S-parameter plots often indicate coupling to high-Q resonant structures, where specific frequencies are absorbed by PCB cavities or floating interconnects.
Choosing between a 50 Ω and 1 MΩ oscilloscope input depends on signal bandwidth, cable impedance, and voltage level to ensure accurate and safe measurements.
Following key measurement best practices—anticipating results, understanding instrument limits, defining objectives, and validating consistency—helps ensure accurate oscilloscope measurements.
